公开(公告)号：US20170337985A1

公开(公告)日：2017-11-23

申请号：US15597820

申请日：2017-05-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindita BORAH ,  Muthusubramanian VENKATESWARAN ,  Kushal D. MURTHY ,  Vikram GAKHAR ,  Preetam TADEPARTHY

IPC: G11C29/38 ,  G11C14/00 ,  G11C17/08 ,  G11C29/36

CPC classification number: G11C29/38 ,  G11C17/08 ,  G11C17/16 ,  G11C17/18 ,  G11C29/027 ,  G11C29/12 ,  G11C29/36

Abstract: A one-time programmable (OTP) circuit. The OTP circuit includes a non-volatile OTP memory disposed on a first circuit die. The OTP memory includes a floating gate terminal. The OTP circuit also includes a cross-coupled latch disposed on the first circuit die and coupled to the OTP memory and volatile memory input circuitry disposed on the first circuit die and coupled to the cross-coupled latch. The volatile memory input circuitry is configured to receive a test value and write the test value into the cross-coupled latch. The OTP circuit is configured to receive a programming command and store the test value in the OTP memory in response to receipt of the programming command.

公开(公告)号：US20220209658A1

公开(公告)日：2022-06-30

申请号：US17138484

申请日：2020-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Naman BAFNA ,  Muthusubramanian VENKATESWARAN ,  Mayank JAIN ,  Vikram GAKHAR ,  Vikas LAKHANPAL ,  Preetam Charan Anand TADEPARTHY ,  Pamidi RAMASIDDAIAH

IPC: H02M3/155 ,  H02M1/08 ,  H03K5/24

Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

公开(公告)号：US20250116728A1

公开(公告)日：2025-04-10

申请号：US18585853

申请日：2024-02-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nischal R ,  Dattatreya Baragur SURYANARAYANA ,  Bikash PRADHAN ,  Vikram GAKHAR ,  VishnuVardhan REDDY J ,  Preetam TADEPARTHY

IPC: G01R31/54 ,  H02H7/12 ,  H02M3/335

Abstract: An example multiphase power converter circuit includes a first power stage is configured to provide a first phase output signal at a first switching output based on a first control signal. The first power stage includes first open fault detection circuitry configured to disable detecting and/or reporting of an open fault condition responsive to the first control signal. A second power stage is configured to provide a second phase output signal at a second switching output based on a second control signal. The second power stage includes second open fault detection circuitry configured to enable detecting and/or reporting of the open fault condition responsive to the second control signal having a value to turn off the second power stage. The second open fault detection circuitry is further configured to detect the open fault condition based on a voltage at the second switching output.

公开(公告)号：US20210203346A1

公开(公告)日：2021-07-01

申请号：US16732213

申请日：2019-12-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vibha GOENKA ,  Preetam Charan Anand TADEPARTHY ,  Vikram GAKHAR ,  Muthusubramanian VENKATESWARAN ,  Siddaram MATHAPATHI

IPC: H03M1/36 ,  H03M1/76 ,  H03M1/46

Abstract: In at least some examples, an integrated circuit includes an input pin and an analog-to-digital converter (ADC) comprising an input terminal coupled to the input pin and an output terminal. The integrated circuit further includes a logic circuit comprising an input terminal coupled to the output terminal of the ADC, a first output terminal, and a second output terminal. The integrated circuit further includes a resistance circuit. In an example, the resistance circuit includes a resistor coupled between the input pin and a first node, a first switch coupled between the first node and a reference voltage pin, and a second switch coupled between the first node and a ground pin.

公开(公告)号：US20190146020A1

公开(公告)日：2019-05-16

申请号：US15810245

申请日：2017-11-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sudeep BANERJI ,  Dattatreya Baragur SURYANARAYANA ,  Vikram GAKHAR ,  Preetam TADEPARTHY ,  Vikas LAKHANPAL ,  Muthusubramanian VENKATESWARAN ,  Vishnuvardhan Reddy J.

IPC: G01R31/01 ,  H02M3/156

CPC classification number: G01R31/013 ,  H02M3/156 ,  H02M3/1584 ,  H02M2001/0009

Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.