公开(公告)号：US20240387729A1

公开(公告)日：2024-11-21

申请号：US18775341

申请日：2024-07-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Ting Ko ,  Han-Chi Lin ,  Chunyao Wang ,  Ching Yu Huang ,  Tze-Liang Lee ,  Yung-Chih Wang

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/3115 ,  H01L21/3213 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66

Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.

公开(公告)号：US20220384649A1

公开(公告)日：2022-12-01

申请号：US17818595

申请日：2022-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Ting Ko ,  Han-Chi Lin ,  Chunyao Wang ,  Ching Yu Huang ,  Tze-Liang Lee ,  Yung-Chih Wang

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/3115 ,  H01L29/66 ,  H01L21/3065 ,  H01L27/088 ,  H01L21/8234

Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.

公开(公告)号：US12125911B2

公开(公告)日：2024-10-22

申请号：US17818595

申请日：2022-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Ting Ko ,  Han-Chi Lin ,  Chunyao Wang ,  Ching Yu Huang ,  Tze-Liang Lee ,  Yung-Chih Wang

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/3115 ,  H01L21/3213 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L29/7843 ,  H01L21/0217 ,  H01L21/02208 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/3065 ,  H01L21/31155 ,  H01L21/32133 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/66795

Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.

公开(公告)号：US11502196B2

公开(公告)日：2022-11-15

申请号：US16933622

申请日：2020-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Ting Ko ,  Han-Chi Lin ,  Chunyao Wang ,  Ching Yu Huang ,  Tze-Liang Lee ,  Yung-Chih Wang

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/3115 ,  H01L29/66 ,  H01L21/3065 ,  H01L27/088 ,  H01L21/8234

Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.

公开(公告)号：US20220336202A1

公开(公告)日：2022-10-20

申请号：US17809917

申请日：2022-06-30

Applicant: Taiwan Semiconductor Manufacturing Co.,Ltd.

Inventor： Wei-Che Hsieh ,  Ching Yu Huang ,  Hsin-Hao Yeh ,  Chunyao Wang ,  Tze-Liang Lee

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/033 ,  H01L21/308

Abstract: A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

公开(公告)号：US12261036B2

公开(公告)日：2025-03-25

申请号：US18358508

申请日：2023-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Che Hsieh ,  Ching Yu Huang ,  Hsin-Hao Yeh ,  Chunyao Wang ,  Tze-Liang Lee

IPC: H01L21/02 ,  H01L21/033 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

Abstract: A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

公开(公告)号：US20240379346A1

公开(公告)日：2024-11-14

申请号：US18783614

申请日：2024-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Che Hsieh ,  Ching Yu Huang ,  Hsin-Hao Yeh ,  Chunyao Wang ,  Tze-Liang Lee

IPC: H01L21/02 ,  H01L21/033 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

Abstract: A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

公开(公告)号：US20230386826A1

公开(公告)日：2023-11-30

申请号：US18358508

申请日：2023-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Che Hsieh ,  Ching Yu Huang ,  Hsin-Hao Yeh ,  Chunyao Wang ,  Tze-Liang Lee

IPC: H01L21/02 ,  H01L21/762 ,  H01L21/033 ,  H01L21/308 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/78

CPC classification number: H01L21/0217 ,  H01L21/76224 ,  H01L21/0337 ,  H01L21/02208 ,  H01L21/3086 ,  H01L21/0228 ,  H01L29/66795 ,  H01L21/3081 ,  H01L29/66545 ,  H01L21/823431 ,  H01L29/785

Abstract: A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

公开(公告)号：US11830727B2

公开(公告)日：2023-11-28

申请号：US17809917

申请日：2022-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Che Hsieh ,  Ching Yu Huang ,  Hsin-Hao Yeh ,  Chunyao Wang ,  Tze-Liang Lee

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/033 ,  H01L21/308

CPC classification number: H01L21/0217 ,  H01L21/0228 ,  H01L21/02208 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/76224 ,  H01L21/823431 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

公开(公告)号：US20200350433A1

公开(公告)日：2020-11-05

申请号：US16933622

申请日：2020-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Ting Ko ,  Han-Chi Lin ,  Chunyao Wang ,  Ching Yu Huang ,  Tze-Liang Lee ,  Yung-Chih Wang

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/3115 ,  H01L29/66 ,  H01L21/3065 ,  H01L27/088 ,  H01L21/8234

Abstract: A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.