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    SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING
    1.
    发明申请
    SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING 审中-公开

    公开(公告)号：US20200250368A1

    公开(公告)日：2020-08-06

    申请号：US16778249

    申请日：2020-01-31

    Applicant: Tektronix, Inc.

    Inventor： Daniel S. Froelich ,  Shane A. Hazzard ,  Sarah R. Boen ,  Jed H. Andrews

    IPC: G06F30/398 ,  G06F13/42 ,  G06F13/20 ,  G06F115/12

    Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link of a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

    SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING
    2.
    发明申请
    SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING 审中-公开

    公开(公告)号：US20200249275A1

    公开(公告)日：2020-08-06

    申请号：US16778262

    申请日：2020-01-31

    Applicant: Tektronix, Inc.

    Inventor： Daniel S. Froelich ,  Shane A. Hazzard ,  Sarah R. Boen ,  Jed H. Andrews

    IPC: G01R31/317 ,  G06F13/40

    Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link of a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

    SERIAL DATA LINK MEASUREMENT AND SIMULATION SYSTEM
    3.
    发明申请
    SERIAL DATA LINK MEASUREMENT AND SIMULATION SYSTEM 审中-公开
    串行数据链路测量和仿真系统

    公开(公告)号：US20130332101A1

    公开(公告)日：2013-12-12

    申请号：US13758614

    申请日：2013-02-04

    Applicant: Tektronix, Inc.

    Inventor： John J. Pickerd ,  Kan Tan ,  Kalev Sepp ,  Sarah R. Boen

    IPC: G06F11/30

    CPC classification number: G06F11/30 ,  G06F17/5022 ,  H04B3/46 ,  H04L25/03057

    Abstract: A serial data link measurement and simulation system for use on a test and measurement instrument presents on a display device a main menu having elements representing a measurement circuit, a simulation circuit and a transmitter. The main menu includes processing flow lines pointing from the measurement circuit to the transmitter and from the transmitter to the simulation circuit. The main menu includes a source input to the measurement circuit and one or more test points from which waveforms may be obtained. The simulation circuit includes a receiver. The measurement and simulation circuits are defined by a user, and the transmitter is common to both circuits so all aspects of the serial data link system are tied together.

    Abstract translation: 用于测试和测量仪器的串行数据链路测量和仿真系统在显示设备上呈现具有表示测量电路，仿真电路和发射机的元件的主菜单。 主菜单包括处理从测量电路指向发射器和从发射机到仿真电路的流线。 主菜单包括测量电路的源输入和可获得波形的一个或多个测试点。 仿真电路包括接收器。 测量和仿真电路由用户定义，并且发射机对于两个电路是共同的，因此串行数据链路系统的所有方面都被捆绑在一起。

    Serial data link measurement and simulation system
    6.
    发明授权
    Serial data link measurement and simulation system 有权

    公开(公告)号：US10073750B2

    公开(公告)日：2018-09-11

    申请号：US13758614

    申请日：2013-02-04

    Applicant: Tektronix, Inc.

    Inventor： John J. Pickerd ,  Kan Tan ,  Kalev Sepp ,  Sarah R. Boen

    IPC: G06F17/50 ,  G06F11/30 ,  H04B3/46 ,  H04L25/03

    CPC classification number: G06F11/30 ,  G06F17/5022 ,  H04B3/46 ,  H04L25/03057

    Abstract: A serial data link measurement and simulation system for use on a test and measurement instrument presents on a display device. A main menu having elements representing a measurement circuit, a simulation circuit and a transmitter. The main menu includes processing flow lines pointing from the measurement circuit to the transmitter and from the transmitter to the simulation circuit. The main menu includes a source input to the measurement circuit and one or more test points from which waveforms may be obtained. The simulation circuit includes a receiver. The measurement and simulation circuits are defined by a user, and the transmitter is common to both circuits so all aspects of the serial data link system are tied together.

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