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    Method of manufacturing a floating gate memory device
    1.
    发明授权
    Method of manufacturing a floating gate memory device 失效
    制造浮动栅极存储器件的方法

    公开(公告)号：US5470771A

    公开(公告)日：1995-11-28

    申请号：US658773

    申请日：1991-02-21

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    IPC分类号： H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L21/3215

    CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/7883

    摘要： A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

    摘要翻译： 在半导体衬底的表面上形成栅极氧化膜。 在对应于隧道区域的部分中形成厚度小于栅极绝缘膜厚度的隧道绝缘膜。 在栅极绝缘膜上形成杂质浓度低的第一硅膜。 在第一硅膜上形成杂质浓度高于第一硅膜的第二硅膜，以便与第一硅膜连接。 通过绝缘膜在第二硅膜上形成第三硅膜。 第二和第三硅膜分别形成浮动和控制栅极，从而形成半导体存储器件。

    Method of fabricating a semiconductor pressure sensor
    2.
    发明授权
    Method of fabricating a semiconductor pressure sensor 失效
    制造半导体压力传感器的方法

    公开(公告)号：US4975390A

    公开(公告)日：1990-12-04

    申请号：US132573

    申请日：1987-12-08

    申请人： Tetsuo Fujii ,  Susumu Kuroyanagi ,  Akira Kuroyanagi ,  Tomohiro Funahashi ,  Minekazu Sakai ,  Shinji Yoshihara

    发明人： Tetsuo Fujii ,  Susumu Kuroyanagi ,  Akira Kuroyanagi ,  Tomohiro Funahashi ,  Minekazu Sakai ,  Shinji Yoshihara

    IPC分类号： G01L9/00

    CPC分类号： G01L9/0042 ,  G01L9/0055 ,  Y10S148/012 ,  Y10S148/135

    摘要： Herein disclosed is a semiconductor pressure sensor and a method of manufacture. The sensor includes a plate having a recess in its main surface. A diaphragm has a lower surface therof bonded to a first main surface of the plate and formed so as to have an upper surface having no holes therein. A piezoresistive layer is formed so as to be in contact with the diaphragm and is positioned so as to be at least partially over the recess. The resistance of the piezoresistive layer provides an indication of pressure applied to the diaphragm. The manufacturing method includes forming a piezoresistive layer of a single crystal substrate in a diaphragm without any recrystallization.

    摘要翻译： 这里公开的是半导体压力传感器和制造方法。 传感器包括在其主表面上具有凹部的板。 隔膜具有与板的第一主表面接合的下表面，并且形成为具有在其中没有孔的上表面。 压阻层形成为与隔膜接触并定位成至少部分地位于凹部上方。 压阻层的电阻提供了施加到隔膜的压力的指示。 制造方法包括在隔膜中形成单晶基板的压阻层，而不会再结晶。

    Semiconductor memory device and method of manufacturing the same
    3.
    发明授权
    Semiconductor memory device and method of manufacturing the same 失效

    公开(公告)号：US06525400B2

    公开(公告)日：2003-02-25

    申请号：US10078506

    申请日：2002-02-21

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    IPC分类号： H01L2900

    CPC分类号： H01L29/7883 ,  H01L21/28273

    摘要： A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

    Semiconductor memory device and method of manufacturing the same
    4.
    发明授权
    Semiconductor memory device and method of manufacturing the same 失效
    半导体存储器件及其制造方法

    公开(公告)号：US06365458B1

    公开(公告)日：2002-04-02

    申请号：US09661572

    申请日：2000-09-14

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    IPC分类号： H01L21336

    CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/7883

    摘要： A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

    摘要翻译： 在半导体衬底的表面上形成栅极氧化膜。 在对应于隧道区域的部分中形成厚度小于栅极绝缘膜厚度的隧道绝缘膜。 在栅极绝缘膜上形成杂质浓度低的第一硅膜。 在第一硅膜上形成杂质浓度高于第一硅膜的第二硅膜，以便与第一硅膜连接。 通过绝缘膜在第二硅膜上形成第三硅膜。 第二和第三硅膜分别形成浮动和控制栅极，从而形成半导体存储器件。

    Semiconductor memory device and method of manufacturing the same
    5.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权

    公开(公告)号：US06373093B1

    公开(公告)日：2002-04-16

    申请号：US09776769

    申请日：2001-02-06

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    IPC分类号： H01L2976

    摘要： A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

    Semiconductor memory device of a floating gate tunnel oxide type
    6.
    发明授权
    Semiconductor memory device of a floating gate tunnel oxide type 失效
    浮栅隧道氧化物半导体存储器件

    公开(公告)号：US5063423A

    公开(公告)日：1991-11-05

    申请号：US567760

    申请日：1990-08-15

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    IPC分类号： H01L21/28 ,  H01L29/788

    CPC分类号： H01L21/28273 ,  H01L29/7883

    摘要： A tunnel insulating film of a three-layer structure, wherein an oxide film is interposed between nitrided oxide films, is formed on the surface of a semiconductor substrate. A first polysilicon film serving as a low-concentration impurity region is formed on the tunnel insulating film. An oxide film is formed on that region of the first polysilicon film, which corresponds to the tunnel insulating film, the oxide film having such a thickness that the film can serve as a stopper for impurity diffusion and can allow electrons to pass through. A second polysilicon film, having an impurity concentration higher than that of the first polysilicon film, is formed on the oxide film. The first and second polysilicon films constitute a floating gate. A third polysilicon film serving as a control gate is formed above the second polysilicon film, with an insulating layer interposed therebetween.

    摘要翻译： 在半导体衬底的表面上形成三层结构的隧道绝缘膜，其中在氮化氧化物膜之间插入氧化膜。 在隧道绝缘膜上形成用作低浓度杂质区的第一多晶硅膜。 在第一多晶硅膜的与隧道绝缘膜相对应的区域上形成氧化膜，氧化膜具有使膜能够作为用于杂质扩散的阻挡层的厚度，并且可以使电子通过。 在氧化膜上形成杂质浓度高于第一多晶硅膜的第二多晶硅膜。 第一和第二多晶硅膜构成浮栅。 用作控制栅极的第三多晶硅膜形成在第二多晶硅膜上方，绝缘层位于其间。

    EEPROM semiconductor memory device
    7.
    发明授权
    EEPROM semiconductor memory device 失效
    EEPROM半导体存储器件

    公开(公告)号：US5017979A

    公开(公告)日：1991-05-21

    申请号：US344605

    申请日：1989-04-28

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

    IPC分类号： H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788

    CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/7883

    摘要： A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

    摘要翻译： 在半导体衬底的表面上形成栅极氧化膜。 在对应于隧道区域的部分中形成厚度小于栅极绝缘膜厚度的隧道绝缘膜。 在栅极绝缘膜上形成杂质浓度低的第一硅膜。 在第一硅膜上形成杂质浓度高于第一硅膜的第二硅膜，以便与第一硅膜连接。 通过绝缘膜在第二硅膜上形成第三硅膜。 第二和第三硅膜分别形成浮动和控制栅极，从而形成半导体存储器件。

    PHYSICAL QUANTITY DETECTION DEVICE AND METHOD FOR MANUFACTURING THE SAME
    8.
    发明申请
    PHYSICAL QUANTITY DETECTION DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
    物理量检测装置及其制造方法

    公开(公告)号：US20110248363A1

    公开(公告)日：2011-10-13

    申请号：US13083732

    申请日：2011-04-11

    申请人： Tetsuo FUJII ,  Minekazu Sakai ,  Takumi Shibata

    发明人： Tetsuo FUJII ,  Minekazu Sakai ,  Takumi Shibata

    IPC分类号： H01L29/84 ,  H01L21/20

    CPC分类号： G01L9/0005

    摘要： A physical quantity detection device includes: an insulating layer; a semiconductor layer on the insulating layer; and first and second electrodes in the semiconductor layer. Each electrode has a wall part, one of which includes two diaphragms and a cover part. The diaphragms facing each other provide a hollow cylinder having an opening covered by the cover part. One diaphragm faces the other wall part or one diaphragm in the other wall part. A distance between the one diaphragm and the other wall part or the one diaphragm in the other wall part is changed with pressure difference between reference pressure in the hollow cylinder and pressure of an outside when a physical quantity is applied to the diaphragms. The physical quantity is detected by a capacitance between the first and second electrodes.

    摘要翻译： 物理量检测装置包括：绝缘层; 绝缘层上的半导体层; 以及半导体层中的第一和第二电极。 每个电极具有壁部分，其中一个包括两个隔膜和盖部分。 彼此相对的隔膜提供具有由盖部分覆盖的开口的中空圆柱体。 一个隔膜面对另一个壁部分或另一个壁部分的一个隔膜。 当物理量施加到隔膜时，一个隔膜和另一个壁部分中的另一个壁部分或一个隔膜之间的距离随空心圆柱体中的参考压力和外部压力之间的压力差而改变。 物理量由第一和第二电极之间的电容检测。

    Physical quantity detection device and method for manufacturing the same
    10.
    发明授权
    Physical quantity detection device and method for manufacturing the same 失效
    物理量检测装置及其制造方法

    公开(公告)号：US08604565B2

    公开(公告)日：2013-12-10

    申请号：US13083732

    申请日：2011-04-11

    申请人： Tetsuo Fujii ,  Minekazu Sakai ,  Takumi Shibata

    发明人： Tetsuo Fujii ,  Minekazu Sakai ,  Takumi Shibata

    IPC分类号： H01L29/82

    CPC分类号： G01L9/0005

    摘要： A physical quantity detection device includes: an insulating layer; a semiconductor layer on the insulating layer; and first and second electrodes in the semiconductor layer. Each electrode has a wall part, one of which includes two diaphragms and a cover part. The diaphragms facing each other provide a hollow cylinder having an opening covered by the cover part. One diaphragm faces the other wall part or one diaphragm in the other wall part. A distance between the one diaphragm and the other wall part or the one diaphragm in the other wall part is changed with pressure difference between reference pressure in the hollow cylinder and pressure of an outside when a physical quantity is applied to the diaphragms. The physical quantity is detected by a capacitance between the first and second electrodes.

    摘要翻译： 物理量检测装置包括：绝缘层; 绝缘层上的半导体层; 以及半导体层中的第一和第二电极。 每个电极具有壁部分，其中一个包括两个隔膜和盖部分。 彼此相对的隔膜提供具有由盖部分覆盖的开口的中空圆柱体。 一个隔膜面对另一个壁部分或另一个壁部分的一个隔膜。 当物理量施加到隔膜时，一个隔膜和另一个壁部分中的另一个壁部分或一个隔膜之间的距离随空心圆柱体中的参考压力和外部压力之间的压力差而改变。 物理量由第一和第二电极之间的电容检测。