公开(公告)号：US20180366364A1

公开(公告)日：2018-12-20

申请号：US16109679

申请日：2018-08-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tong-Yu Chen ,  Chia-Fang Lin

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L23/485

Abstract: An interconnect layout structure, having a plurality of air gaps, includes a substrate having an insulating material disposed thereon and a conductive line disposed in the insulating material and extending along a first direction. The air gaps are formed in the insulating material and are arranged end-to-end along the first direction and immediately adjacent to a same side of the conductive line. A patterned hard mask is disposed on the conductive line and has a sidewall extending along a second direction that is perpendicular to the first direction and passing between the adjacent air gaps from the top view. A via structure is formed on the conductive line and is electrically connected to the conductive line.

公开(公告)号：US20170194191A1

公开(公告)日：2017-07-06

申请号：US15007212

申请日：2016-01-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tong-Yu Chen ,  Chia-Fang Lin

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L21/7682 ,  H01L23/485 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53295

Abstract: An interconnect layout structure having air gaps includes a plurality of air gaps extended along a direction, and at least a first interconnect unit disposed in between the air gaps. The first interconnect unit includes a first conductive line, a first landing mark situated on the first conductive line and a first via structure situated on the first landing mark. The first via structure penetrates the first landing mark and is electrically connected to the first conductive line. And the first landing mark physically separates the air gaps arranged in a straight line.

公开(公告)号：US20150014828A1

公开(公告)日：2015-01-15

申请号：US13939184

申请日：2013-07-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Li Kuo ,  Yung-Chang Lin ,  Ming-Tse Lin ,  Kuei-Sheng Wu ,  Chia-Fang Lin

IPC: H01L23/552

CPC classification number: H01L23/552 ,  H01L23/481 ,  H01L23/535 ,  H01L23/585 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a semiconductor device with a shielding structure. The semiconductor device includes a substrate, an RF circuit, a shielding structure and an interconnection system. The substrate includes an active side and a back side. The RF circuit is disposed on the active side of the substrate. The shielding structure is disposed on the active side and encompasses the RF circuit. The shielding structure is grounded. The shielding structure includes a shielding TST which does not penetrate through the substrate. The interconnection system is disposed on the active side of the substrate. The interconnection system includes a connecting unit electrically connect a signal to the RF circuit.

Abstract translation: 本发明提供一种具有屏蔽结构的半导体器件。 半导体器件包括衬底，RF电路，屏蔽结构和互连系统。 基板包括有源侧和背面。 RF电路设置在基板的有源侧。 屏蔽结构设置在有源侧并且包围RF电路。 屏蔽结构接地。 屏蔽结构包括不穿透基板的屏蔽TST。 互连系统设置在基板的有源侧。 互连系统包括将信号电连接到RF电路的连接单元。

公开(公告)号：US10658232B2

公开(公告)日：2020-05-19

申请号：US16109679

申请日：2018-08-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tong-Yu Chen ,  Chia-Fang Lin

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485

Abstract: An interconnect layout structure, having a plurality of air gaps, includes a substrate having an insulating material disposed thereon and a conductive line disposed in the insulating material and extending along a first direction. The air gaps are formed in the insulating material and are arranged end-to-end along the first direction and immediately adjacent to a same side of the conductive line. A patterned hard mask is disposed on the conductive line and has a sidewall extending along a second direction that is perpendicular to the first direction and passing between the adjacent air gaps from the top view. A via structure is formed on the conductive line and is electrically connected to the conductive line.

公开(公告)号：US20190214292A1

公开(公告)日：2019-07-11

申请号：US16354157

申请日：2019-03-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tong-Yu Chen ,  Chia-Fang Lin

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A method for manufacturing an interconnect structure with air gaps includes the following steps. A substrate including a first insulating layer formed thereon is provided. Plural conductive lines are formed in the first insulating layer. A patterned hard mask is formed on the first insulating layer and the conductive lines and exposes portions of the first insulating layer and portions of the conductive lines. The exposed portions of the first insulating layer are then removed to form a plurality of recesses in the first insulating layer. After that, a second insulating layer and a third insulating layer are formed in the recesses to seal the recesses and to form a plurality of air gaps in the recesses. At least two air gaps are respectively formed at two sides of one conductive line of the plurality of conductive lines. A via structure is then formed on the one conductive line.

公开(公告)号：US10276429B2

公开(公告)日：2019-04-30

申请号：US15007212

申请日：2016-01-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tong-Yu Chen ,  Chia-Fang Lin

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485

Abstract: An interconnect layout structure having air gaps includes a plurality of air gaps extended along a direction, and at least a first interconnect unit disposed in between the air gaps. The first interconnect unit includes a first conductive line, a first landing mark situated on the first conductive line and a first via structure situated on the first landing mark. The first via structure penetrates the first landing mark and is electrically connected to the first conductive line. And the first landing mark physically separates the air gaps arranged in a straight line.

公开(公告)号：US09123730B2

公开(公告)日：2015-09-01

申请号：US13939184

申请日：2013-07-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Li Kuo ,  Yung-Chang Lin ,  Ming-Tse Lin ,  Kuei-Sheng Wu ,  Chia-Fang Lin

IPC: H01L23/552 ,  H01L23/58 ,  H01L23/00 ,  H01L23/48 ,  H01L23/66

CPC classification number: H01L23/552 ,  H01L23/481 ,  H01L23/535 ,  H01L23/585 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a semiconductor device with a shielding structure. The semiconductor device includes a substrate, an RF circuit, a shielding structure and an interconnection system. The substrate includes an active side and a back side. The RF circuit is disposed on the active side of the substrate. The shielding structure is disposed on the active side and encompasses the RF circuit. The shielding structure is grounded. The shielding structure includes a shielding TST which does not penetrate through the substrate. The interconnection system is disposed on the active side of the substrate. The interconnection system includes a connection unit providing a signal to the RF circuit.

Abstract translation: 本发明提供一种具有屏蔽结构的半导体器件。 半导体器件包括衬底，RF电路，屏蔽结构和互连系统。 基板包括有源侧和背面。 RF电路设置在基板的有源侧。 屏蔽结构设置在有源侧并且包围RF电路。 屏蔽结构接地。 屏蔽结构包括不穿透基板的屏蔽TST。 互连系统设置在基板的有源侧。 互连系统包括向RF电路提供信号的连接单元。