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    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权

    公开(公告)号：US20210028352A1

    公开(公告)日：2021-01-28

    申请号：US17064614

    申请日：2020-10-07

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chih-Wei Kuo ,  Meng-Jun Wang ,  Yi-Wei Tseng ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

    IPC: H01L43/02 ,  H01L43/12

    Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a first inter-metal dielectric (IMD) layer around the MTJ; forming an etch stop layer on the first IMD layer; forming a second IMD layer on the etch stop layer; forming a patterned hard mask on the second IMD layer; performing a first etching process to form a contact hole in the second IMD layer for exposing the etch stop layer; performing a second etching process to remove the patterned hard mask; performing a third etching process to remove the etch stop layer and the first IMD layer for exposing the MTJ; and forming a metal interconnection in the contact hole.

    MEMORY DEVICE
    3.
    发明申请
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20200051922A1

    公开(公告)日：2020-02-13

    申请号：US16059046

    申请日：2018-08-09

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Meng-Jun Wang ,  Jiunn-Hsiung Liao ,  Yu-Tsung Lai

    IPC: H01L23/544 ,  H01L23/528

    Abstract: A memory device includes an insulation layer, an interconnection structure disposed in the insulation layer, a dielectric layer disposed on the insulation layer and the interconnection structure, a connection hole disposed on the interconnection structure and penetrates the dielectric layer, an alignment mark trench penetrating the dielectric layer on a peripheral region, a first patterned conductive layer, and a patterned memory material layer. The first patterned conductive layer includes a connection structure at least partly disposed in the connection hole and a first pattern disposed in the alignment mark trench. The patterned memory material layer includes a first memory material pattern disposed on the connection structure and a second memory material pattern disposed in the alignment mark trench. Manufacturing yield and alignment condition of forming the memory device may be improved by disposing a part of the first patterned conductive layer in the alignment mark trench.

    Semiconductor device and method for fabricating the same
    4.
    发明授权
    Semiconductor device and method for fabricating the same 有权

    公开(公告)号：US11283007B2

    公开(公告)日：2022-03-22

    申请号：US17064614

    申请日：2020-10-07

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chih-Wei Kuo ,  Meng-Jun Wang ,  Yi-Wei Tseng ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

    IPC: H01L27/22 ,  H01L43/02 ,  H01L43/12

    Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a first inter-metal dielectric (IMD) layer around the MTJ; forming an etch stop layer on the first IMD layer; forming a second IMD layer on the etch stop layer; forming a patterned hard mask on the second IMD layer; performing a first etching process to form a contact hole in the second IMD layer for exposing the etch stop layer; performing a second etching process to remove the patterned hard mask; performing a third etching process to remove the etch stop layer and the first IMD layer for exposing the MTJ; and forming a metal interconnection in the contact hole.

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