公开(公告)号：US10068979B2

公开(公告)日：2018-09-04

申请号：US15677035

申请日：2017-08-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi Chuen Eng ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/423 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

公开(公告)号：US09923071B2

公开(公告)日：2018-03-20

申请号：US15682525

申请日：2017-08-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi Chuen Eng ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L21/00 ,  H01L21/02 ,  H01L29/423 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

公开(公告)号：US20170309708A1

公开(公告)日：2017-10-26

申请号：US15169753

申请日：2016-06-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Ming-Chih Chen

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78

CPC classification number: H01L29/78 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/7835 ,  H01L29/7843 ,  H01L29/7848

Abstract: A field effect transistor is provided in the present invention with an active area including a source region, a drain region, and a channel region. The width of the channel region is larger than the width of the source/drain regions, and at least one of the source region and the drain region is comb-shaped.

公开(公告)号：US20170352736A1

公开(公告)日：2017-12-07

申请号：US15682525

申请日：2017-08-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

公开(公告)号：US20190229014A1

公开(公告)日：2019-07-25

申请号：US15888069

申请日：2018-02-04

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Kuan-Chun Lin ,  Hsin-Fu Huang ,  Wei-Chih Chen

IPC: H01L21/768 ,  H01L21/02 ,  H01L23/532 ,  H01L23/522

Abstract: A method for fabricating a semiconductor structure is disclosed. A bit line is formed on a substrate. The bit line comprises a tungsten layer and cap layer on the tungsten layer. A low-temperature physical vapor deposition (PVD) process is performed to deposit a silicon nitride spacer layer covering the bit line and the substrate. The silicon nitride spacer layer is in direct contact with the tungsten layer. The low-temperature PVD process is performed at a temperature ranging between 200˜400° C.

公开(公告)号：US20150108587A1

公开(公告)日：2015-04-23

申请号：US14057095

申请日：2013-10-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Chih Chen ,  Chung-Hsien Tsai ,  Tung-Ming Chen ,  Chih-Sheng Chang ,  Jun-Chi Huang ,  Chih-Jen Lin ,  Yu-Hsiang Lin

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/28052 ,  H01L21/2652 ,  H01L21/28114 ,  H01L29/42372 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843 ,  H01L29/7847

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes following steps. A gate electrode layer is formed on a substrate. A spacer structure is formed on a sidewall of the gate electrode layer. A dielectric cap film is formed to cover the gate electrode layer and the spacer structure. A source/drain implantation is performed to the substrate with the dielectric cap film exposed to a condition of the source/drain implantation.

Abstract translation: 提供半导体结构及其形成方法。 该方法包括以下步骤。 在基板上形成栅极电极层。 间隔结构形成在栅电极层的侧壁上。 形成介电盖膜以覆盖栅电极层和间隔结构。 在介质盖膜暴露于源极/漏极注入的条件下，对衬底进行源极/漏极注入。

公开(公告)号：US09773880B2

公开(公告)日：2017-09-26

申请号：US14877926

申请日：2015-10-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi Chuen Eng ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

公开(公告)号：US09355848B2

公开(公告)日：2016-05-31

申请号：US14057095

申请日：2013-10-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Chih Chen ,  Chung-Hsien Tsai ,  Tung-Ming Chen ,  Chih-Sheng Chang ,  Jun-Chi Huang ,  Chih-Jen Lin ,  Yu-Hsiang Lin

IPC: H01L21/336 ,  H01L21/28 ,  H01L29/423 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/28052 ,  H01L21/2652 ,  H01L21/28114 ,  H01L29/42372 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843 ,  H01L29/7847

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes following steps. A gate electrode layer is formed on a substrate. A spacer structure is formed on a sidewall of the gate electrode layer. A dielectric cap film is formed to cover the gate electrode layer and the spacer structure. A source/drain implantation is performed to the substrate with the dielectric cap film exposed to a condition of the source/drain implantation.

Abstract translation: 提供半导体结构及其形成方法。 该方法包括以下步骤。 在基板上形成栅极电极层。 间隔结构形成在栅电极层的侧壁上。 形成介电盖膜以覆盖栅电极层和间隔结构。 在介质盖膜暴露于源极/漏极注入的条件下，对衬底进行源极/漏极注入。

公开(公告)号：US20180012971A1

公开(公告)日：2018-01-11

申请号：US15677035

申请日：2017-08-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

公开(公告)号：US20170069730A1

公开(公告)日：2017-03-09

申请号：US14877926

申请日：2015-10-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

Abstract translation: 鳍状场效应晶体管包括衬底和栅极。 基板包括有源区域，其中有源区域包括具有至少一个从翅片结构突出的延伸部分的翅片结构。 门设置在翅片结构上并直接在延伸部分上。 本发明还提供一种包括衬底和栅极的平面场效应晶体管。 基板包括有源区域，其中有源区域包括框架区域和贯穿框架区域的穿透区域。 栅极设置在有源区域上，其中栅极直接设置在穿透区域上，并且至少在栅极侧的框架区域构成围绕隔离岛的源极/漏极。