公开(公告)号：US09786489B1

公开(公告)日：2017-10-10

申请号：US15461486

申请日：2017-03-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ming Sheng Xu ,  Ching-Long Tsai ,  Hua-Kuo Lee ,  Guangjun Huang

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L21/02063 ,  H01L21/76807 ,  H01L2224/45147 ,  H01L2924/01029 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335

Abstract: A method of cleaning post-etch residues on a copper line includes providing a copper line which is divided into a first region and a second region. A dielectric layer is formed on the copper line. After that, the dielectric layer is etched to form openings in the dielectric layer. A number of openings within the first region is more than a number of openings in the second region. During the etching process, a potential difference is formed between the first region and the second region of the copper line. Finally, the dielectric layer and the copper line are cleaned by a solution with a PH value. The PH value has a special relation with the potential difference.

公开(公告)号：US20150140800A1

公开(公告)日：2015-05-21

申请号：US14082200

申请日：2013-11-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei Cheng ,  Ming Sheng Xu ,  Duan Quan Liao ,  Yikun Chen ,  CHING HWA TEY

IPC: H01L21/28 ,  H01L21/8234

CPC classification number: H01L21/28132 ,  H01L21/28273 ,  H01L21/823468 ,  H01L27/11524

Abstract: A method of fabricating a semiconductor device includes the following steps. At least a first gate stack layer and at least a second gate stack layer protruding from a conductive layer on a substrate are provided. Subsequently, two spacers and a protective layer are formed on the conductive layer, and the two spacers and the protective layer jointly surround the protruded first gate stack layer and the protruded second gate stack layer. The two spacers and the protective layer are used as a mask to remove a part of the conductive layer. Afterwards, the two spacers and the protective layer are removed.

Abstract translation: 制造半导体器件的方法包括以下步骤。 提供至少一个第一栅堆叠层和至少一个从衬底上的导电层突出的第二栅堆叠层。 随后，在导电层上形成两个间隔物和保护层，两个间隔物和保护层共同围绕突出的第一栅叠层和突出的第二栅堆叠层。 将两个间隔物和保护层用作掩模以去除导电层的一部分。 之后，取下两个间隔物和保护层。

公开(公告)号：US09023726B1

公开(公告)日：2015-05-05

申请号：US14082200

申请日：2013-11-18

Applicant: United Microelectronics Corp.

Inventor： Wei Cheng ,  Ming Sheng Xu ,  Duan Quan Liao ,  Yikun Chen ,  Ching Hwa Tey

IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/8234

CPC classification number: H01L21/28132 ,  H01L21/28273 ,  H01L21/823468 ,  H01L27/11524

Abstract: A method of fabricating a semiconductor device includes the following steps. At least a first gate stack layer and at least a second gate stack layer protruding from a conductive layer on a substrate are provided. Subsequently, two spacers and a protective layer are formed on the conductive layer, and the two spacers and the protective layer jointly surround the protruded first gate stack layer and the protruded second gate stack layer. The two spacers and the protective layer are used as a mask to remove a part of the conductive layer. Afterwards, the two spacers and the protective layer are removed.

Abstract translation: 制造半导体器件的方法包括以下步骤。 提供至少一个第一栅堆叠层和至少一个从衬底上的导电层突出的第二栅堆叠层。 随后，在导电层上形成两个间隔物和保护层，两个间隔物和保护层共同围绕突出的第一栅叠层和突出的第二栅堆叠层。 将两个间隔物和保护层用作掩模以去除导电层的一部分。 之后，取下两个间隔物和保护层。