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    Image sensor and manufacturing method thereof
    1.
    发明公开
    Image sensor and manufacturing method thereof 审中-公开

    公开(公告)号：US20230225139A1

    公开(公告)日：2023-07-13

    申请号：US18122718

    申请日：2023-03-17

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Zhaoyao Zhan ,  QIANWEI DING ,  XIAOHONG JIANG ,  CHING HWA TEY

    IPC: H10K39/32 ,  H10K85/50

    CPC classification number: H10K39/32 ,  H10K85/50

    Abstract: The present invention provides an image sensor, the image sensor includes a substrate, a first circuit layer on the substrate, at least one nanowire photodiode located on the first circuit layer and electrically connected with the first circuit layer, wherein the nanowire photodiode comprises a lower material layer and an upper material layer, and a P-N junction or a Schottky junction is arranged between the lower material layer and the upper material layer, wherein the lower material layer comprises a perovskite material, and a precursor layer located under the lower material layer, wherein the precursor layer comprises different metal elements as the lower material layer

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210167170A1

    公开(公告)日：2021-06-03

    申请号：US16700504

    申请日：2019-12-02

    Applicant: United Microelectronics Corp

    Inventor： Zhaoyao Zhan

    IPC: H01L29/06 ,  H01L21/265 ,  H01L29/66 ,  H01L21/306 ,  H01L21/762 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423

    Abstract: A method of manufacturing a semiconductor device including following steps is provided. A substrate is provided. An ion implantation process is performed on the substrate to form doped material layers at different depth positions of the substrate and to define at least one nanowire layer. The at least one nanowire layer and the doped material layers are alternately stacked. A patterning process is performed on the at least one nanowire layer and the doped material layers to form at least one nanowire and doped layers. The at least one nanowire and the doped layers are alternately stacked to form a stack structure. A dummy gate structure spanning over the stack structure is formed. Spacers located on sidewalls of the dummy gate structure is formed. The dummy gate structure is removed to expose the at least one nanowire and the doped layers. The exposed doped layers are removed to form openings.

    Method of manufacturing semiconductor device
    7.
    发明授权
    Method of manufacturing semiconductor device 有权

    公开(公告)号：US11189691B2

    公开(公告)日：2021-11-30

    申请号：US16700504

    申请日：2019-12-02

    Applicant: United Microelectronics Corp.

    Inventor： Zhaoyao Zhan

    IPC: H01L29/06 ,  H01L21/265 ,  H01L29/66 ,  H01L21/306 ,  H01L21/762 ,  H01L29/423 ,  H01L29/10 ,  H01L29/08

    Abstract: A method of manufacturing a semiconductor device including following steps is provided. A substrate is provided. An ion implantation process is performed on the substrate to form doped material layers at different depth positions of the substrate and to define at least one nanowire layer. The at least one nanowire layer and the doped material layers are alternately stacked. A patterning process is performed on the at least one nanowire layer and the doped material layers to form at least one nanowire and doped layers. The at least one nanowire and the doped layers are alternately stacked to form a stack structure. A dummy gate structure spanning over the stack structure is formed. Spacers located on sidewalls of the dummy gate structure is formed. The dummy gate structure is removed to expose the at least one nanowire and the doped layers. The exposed doped layers are removed to form openings.

    RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250031585A1

    公开(公告)日：2025-01-23

    申请号：US18447317

    申请日：2023-08-10

    Applicant: United Microelectronics Corp.

    Inventor： Zhaoyao Zhan ,  Jian Shi ,  Xiaohong Jiang ,  Ching-Hwa Tey

    IPC: H10N70/00 ,  H10B63/00

    Abstract: A resistive random access memory includes a first electrode, a second electrode, a dielectric layer, a protection layer, and at least one switching layer. The dielectric layer is formed on the first electrode. The dielectric layer has an opening exposing a portion of the first electrode. The protection layer is disposed on sidewalls of the opening. The switching layer is disposed on the exposed portion of the first electrode and exposes a portion of sidewalls of the protection layer. The second electrode is at least one conductive layer and is disposed on the switching layer in the opening.

    MANUFACTURING METHOD OF IMAGE SENSOR STRUCTURE
    10.
    发明申请
    MANUFACTURING METHOD OF IMAGE SENSOR STRUCTURE 有权

    公开(公告)号：US20250022905A1

    公开(公告)日：2025-01-16

    申请号：US18900947

    申请日：2024-09-30

    Applicant: United Microelectronics Corp.

    Inventor： Zhaoyao Zhan ,  Jing Feng ,  Qianwei Ding ,  Xiaohong Jiang ,  Ching-Hwa Tey

    IPC: H01L27/146

    Abstract: An image sensor structure including a substrate, a nanowire structure, a first conductive line, a second conductive line, and a third conductive line is provided. The nanowire structure includes a first doped layer, a second doped layer, a third doped layer, and a fourth doped layer sequentially stacked on the substrate. The first doped layer and the third doped layer have a first conductive type. The second doped layer and the fourth doped layer have a second conductive type. The first conductive line is connected to a sidewall of the second doped layer. The second conductive line is connected to a sidewall of the third doped layer. The third conductive line is connected to the fourth doped layer.

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