公开(公告)号：US07283372B2

公开(公告)日：2007-10-16

申请号：US10857635

申请日：2004-05-28

申请人： Werner Weber ,  Gunter Schmid ,  Richard J. Luyken ,  Roland Thewes ,  Markus Seitz

发明人： Werner Weber ,  Gunter Schmid ,  Richard J. Luyken ,  Roland Thewes ,  Markus Seitz

IPC分类号： H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC分类号： H01L51/0595 ,  B82Y10/00 ,  G11C13/0009 ,  G11C13/0014 ,  G11C2213/15 ,  G11C2213/72 ,  H01L27/28 ,  H01L51/005 ,  H01L51/0053 ,  H01L51/0062 ,  H01L51/0077

摘要： Circuit element having a first layer composed of an electrically insulating substrate material, a first electrically conductive material which is in the form of at least one discrete area, such that it is embedded in or applied to the substrate material, a second layer having a second electrically conductive material, and a monomolecular layer, which is composed of electrically active molecules which transports charge carriers, arranged between the first layer and the second layer. The monomolecular layer is immobilized and makes electrical contact with the second layer. Each of the electrically active molecules has a first unit, which is used as an electron donor, a second unit, which is used as an electron acceptor, wherein the electron donor and the electron acceptor form a diode, and at least one redox-active unit, by means of which a variable resistance is formed, arranged between the first unit and the second unit.

摘要翻译： 具有由电绝缘衬底材料构成的第一层的电路元件，至少一个离散区域形式的第一导电材料，使得其嵌入衬底材料中或施加到衬底材料上，第二层具有第二层 导电材料和单分子层，其由布置在第一层和第二层之间的电荷载流子的电活性分子组成。 单分子层被固定并与第二层电接触。 每个电活性分子具有用作电子给体的第一单元，用作电子受体的第二单元，其中电子给体和电子受体形成二极管，以及至少一种氧化还原活性 单元，其中形成有可变电阻，布置在第一单元和第二单元之间。

公开(公告)号：US07368752B2

公开(公告)日：2008-05-06

申请号：US10839800

申请日：2004-05-06

申请人： Richard J. Luyken ,  Franz Hofmann ,  Lothar Risch ,  Dirk Manger ,  Wolfgang Rösner ,  Till Schlösser ,  Michael Specht

发明人： Richard J. Luyken ,  Franz Hofmann ,  Lothar Risch ,  Dirk Manger ,  Wolfgang Rösner ,  Till Schlösser ,  Michael Specht

IPC分类号： H01L27/108 ,  H01L29/12 ,  H01L31/112

CPC分类号： H01L27/10823 ,  H01L27/10808 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10891 ,  H01L29/7851

摘要： A DRAM memory cell is provided with a selection transistor, which is arranged horizontally at a semiconductor substrate surface and has a first source/drain electrode, a second source/drain electrode, a channel layer arranged between the first and the second source/drain electrode in the semiconductor substrate, and a gate electrode, which is arranged along the channel layer and is electrically insulated from the channel layer, a storage capacitor, which has a first capacitor electrode and a second capacitor electrode, insulated from the first capacitor electrode, one of the capacitor electrodes of the storage capacitor being electrically conductively connected to one of the source/drain electrodes of the selection transistor, and a semiconductor substrate electrode on the rear side, the gate electrode enclosing the channel layer at at least two opposite sides.

摘要翻译： DRAM存储单元设置有选择晶体管，该晶体管被水平地布置在半导体衬底表面处并且具有第一源极/漏极，第二源极/漏极，布置在第一和第二源极/漏极之间的沟道层 在所述半导体基板中，沿着所述沟道层配置并与所述沟道层电绝缘的栅电极具有与所述第一电容电极绝缘的第一电容电极和第二电容电极的保持电容器， 所述存储电容器的电容器电极与所述选择晶体管的源极/漏极之一导电地连接，并且在后侧具有半导体衬底电极，所述栅电极在至少两个相对的两侧包围所述沟道层。