公开(公告)号：US11055106B1

公开(公告)日：2021-07-06

申请号：US16719449

申请日：2019-12-18

Applicant: Xilinx, Inc.

Inventor： Ellery Cochell ,  Brian S. Martin ,  Chandrasekhar S. Thyamagondlu ,  Ravi N. Kurlagunda

IPC: G06F9/4401 ,  G06F21/57 ,  G06F13/28

Abstract: Bootstrapping a programmable integrated circuit (IC) based network interface card (NIC) can include implementing, within the programmable IC, a first circuitry by loading a first stage configuration bitstream, wherein the first circuitry includes a bus endpoint configured to communicate with a host computer via a communication bus, a platform processor, and a first bootloader. The platform processor, executing the first bootloader, loads a first firmware within the programmable IC. A second circuitry is implemented within the programmable IC by the platform processor executing the first firmware to load a second stage configuration bitstream. The second circuitry includes a NIC controller. The platform processor, executing the first firmware, loads a second firmware within the programmable IC. The second firmware is executable to configure the second circuitry.

公开(公告)号：US10990547B2

公开(公告)日：2021-04-27

申请号：US16537605

申请日：2019-08-11

Applicant: Xilinx, Inc.

Inventor： Chandrasekhar S. Thyamagondlu ,  Ravi Sunkavalli ,  Ravi N. Kurlagunda ,  Ellery Cochell

IPC: G06F13/28 ,  G06F30/34

Abstract: A device includes a platform implemented, at least in part, in a static region of programmable circuitry and a dynamic region of programmable circuitry configured to implement user-specified circuitry in communication with the platform. The platform is configured to establish and maintain a first communication link with a host data processing system and a second communication link with a network while at least a portion of the dynamic region of programmable circuitry is dynamically reconfigured.

公开(公告)号：US11916552B2

公开(公告)日：2024-02-27

申请号：US17690845

申请日：2022-03-09

Applicant: XILINX, INC.

Inventor： Ellery Cochell ,  Ripduman Singh Sohan ,  Kieran Mansley

IPC: H03K19/1776 ,  H03K19/17756 ,  G06F30/34 ,  H03K19/00

CPC classification number: H03K19/1776 ,  G06F30/34 ,  H03K19/17756 ,  H03K19/00

Abstract: Techniques and apparatus for dynamically modifying a kernel (and associated user-specified circuitry) for a dynamic region of a programmable integrated circuit (IC) without affecting (e.g., while allowing) operation of other kernels ((and other associated user-specified circuitry) in the programmable IC. Dynamically modifying a kernel may include, for example, unloading an existing kernel, loading a new kernel, or replacing a first kernel with a second kernel). In the case of networking (e.g., in a data center application) where the programmable IC may be part of a hardware acceleration card (e.g., a network interface card (NIC)), the kernel may be user code referred to as a “plugin.”

公开(公告)号：US11144652B1

公开(公告)日：2021-10-12

申请号：US16721550

申请日：2019-12-19

Applicant: Xilinx, Inc.

Inventor： Ellery Cochell ,  Brian S. Martin ,  Ravi N. Kurlagunda

IPC: G06F21/60 ,  G06F21/79 ,  H04L9/08 ,  H04L29/06 ,  G06F21/57

Abstract: Secure updating of programmable integrated circuits includes receiving, within the programmable integrated circuit, a configuration bitstream, inserting, using a processor of the programmable integrated circuit, a key into the configuration bitstream resulting in a modified configuration bitstream, encrypting, using the programmable integrated circuit, the modified configuration bitstream using the key resulting in an encrypted configuration bitstream, and storing the encrypted configuration bitstream in a boot memory for the programmable integrated circuit.

公开(公告)号：US20210042252A1

公开(公告)日：2021-02-11

申请号：US16537605

申请日：2019-08-11

Applicant: Xilinx, Inc.

Inventor： Chandrasekhar S. Thyamagondlu ,  Ravi Sunkavalli ,  Ravi N. Kurlagunda ,  Ellery Cochell

IPC: G06F13/28 ,  G06F17/50

Abstract: A device includes a platform implemented, at least in part, in a static region of programmable circuitry and a dynamic region of programmable circuitry configured to implement user-specified circuitry in communication with the platform. The platform is configured to establish and maintain a first communication link with a host data processing system and a second communication link with a network while at least a portion of the dynamic region of programmable circuitry is dynamically reconfigured.

公开(公告)号：US10705993B2

公开(公告)日：2020-07-07

申请号：US16194911

申请日：2018-11-19

Applicant: Xilinx, Inc.

Inventor： Soren T. Soe ,  Idris I. Tarwala ,  Ellery Cochell

IPC: G06F13/28 ,  G06F13/24

Abstract: An integrated circuit (IC) can include a command queue having a plurality of slots corresponding to commands from a host processor for execution by a plurality of compute units of the IC and a command request register having a plurality of locations corresponding to the plurality of slots in the command queue. The command request register is configured to generate an interrupt indicating a new command stored within the command queue. The IC can include a controller configured to, in response to the interrupt from the command request register, determine a selected compute unit that is idle from the plurality of compute units to execute the new command. The IC can also include a compute unit direct memory access circuit configured to provide the new command to the available compute unit.

公开(公告)号：US20200159680A1

公开(公告)日：2020-05-21

申请号：US16194911

申请日：2018-11-19

Applicant: Xilinx, Inc.

Inventor： Soren T. Soe ,  Idris I. Tarwala ,  Ellery Cochell

IPC: G06F13/24 ,  G06F13/28

Abstract: An integrated circuit (IC) can include a command queue having a plurality of slots corresponding to commands from a host processor for execution by a plurality of compute units of the IC and a command request register having a plurality of locations corresponding to the plurality of slots in the command queue. The command request register is configured to generate an interrupt indicating a new command stored within the command queue. The IC can include a controller configured to, in response to the interrupt from the command request register, determine a selected compute unit that is idle from the plurality of compute units to execute the new command. The IC can also include a compute unit direct memory access circuit configured to provide the new command to the available compute unit.