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    POWER MANAGEMENT DEVICE OF A TOUCHABLE CONTROL SYSTEM
    1.
    发明申请
    POWER MANAGEMENT DEVICE OF A TOUCHABLE CONTROL SYSTEM 有权
    触控控制系统的电源管理装置

    公开(公告)号：US20140104904A1

    公开(公告)日：2014-04-17

    申请号：US13732821

    申请日：2013-01-02

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： H02M3/07

    CPC分类号： H02M3/07 ,  H02M3/073

    摘要： A power management device of a touchable control system includes a boost circuit, a storage circuit, a detection circuit and a loading circuit. The boost circuit has an output terminal and generates an output voltage. The storage circuit electrically connects to the output terminal of the boost circuit and stores the output voltage. The detection circuit electrically connects to the storage circuit so as to detect the output voltage. The loading circuit electrically connects or disconnects to the output terminal of the boost circuit according to a predetermined value of the output voltage.

    摘要翻译： 可触摸控制系统的电源管理装置包括升压电路，存储电路，检测电路和负载电路。 升压电路具有输出端子并产生输出电压。 存储电路电连接到升压电路的输出端并存储输出电压。 检测电路电连接到存储电路，以检测输出电压。 加载电路根据输出电压的预定值将升压电路的输出端电连接或断开。

    POWER GENERATING CIRCUIT, FREQUENCY GENERATING CIRCUIT AND FREQUENCY CONTROL SYSTEM
    2.
    发明申请
    POWER GENERATING CIRCUIT, FREQUENCY GENERATING CIRCUIT AND FREQUENCY CONTROL SYSTEM 有权
    发电电路，频率发生电路和频率控制系统

    公开(公告)号：US20160277032A1

    公开(公告)日：2016-09-22

    申请号：US14822042

    申请日：2015-08-10

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： H03L7/08 ,  H03L7/099 ,  H03M1/66 ,  H03L7/089

    CPC分类号： H03L7/0802 ,  H03L7/085 ,  H03L7/0995 ,  H03M1/66

    摘要： A frequency control system includes a power generating circuit and a frequency generating circuit. The power generating circuit includes an up transistor circuit, a down transistor circuit and a capacitor for generating a stable voltage. The frequency generating circuit includes a digital-to-analog converter (DAC), a current source/sink circuit, a voltage-controlled oscillator (VCO) and a digital controller. The DAC receives the stable voltage as a power, the current source/sink circuit receives an analog signal from the DAC, the VCO receives a control voltage from the current source/sink circuit, and the digital controller receives a frequency signal from the VCO and a reference signal, according to which a digital signal is generated and fed to the DAC.

    摘要翻译： 频率控制系统包括发电电路和频率发生电路。 发电电路包括上行晶体管电路，下降晶体管电路和用于产生稳定电压的电容器。 频率发生电路包括数模转换器（DAC），电流源/汇流电路，压控振荡器（VCO）和数字控制器。 DAC作为电源接收稳定电压，电流源/汇电路从DAC接收模拟信号，VCO从电流源/汇电路接收控制电压，数字控制器从VCO接收频率信号， 参考信号，根据该参考信号产生数字信号并将其馈送到DAC。

    Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof
    3.
    发明申请
    Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof 有权
    集成和模数转换电路与普通电容器及其操作方法

    公开(公告)号：US20130135134A1

    公开(公告)日：2013-05-30

    申请号：US13689931

    申请日：2012-11-30

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： H03M1/46 ,  H03M1/12

    CPC分类号： H03M1/466 ,  G11C27/024 ,  H03M1/12 ,  H03M1/1215 ,  H03M1/1225 ,  H03M1/468

    摘要： The present invention provides an integration and analog to digital conversion circuit sharing common capacitors. The circuit comprises a first capacitor array module, a second capacitor module, an integration circuit, an analog to digital conversion (ADC) logic. The first capacitor array module has a plurality of capacitors. The second capacitor array module has a plurality of capacitors. The integration circuit is configured to integrate an analog signal by said first or said second capacitor array module. The ADC logic is configured to convert the output of said first or said second capacitor array module to a digital signal. The ADC logic performs conversion by said first capacitor array module while said integration circuit performs integration by said second capacitor array module, and said ADC logic performs conversion by said second capacitor array module while said integration circuit performs integration by said first capacitor array module.

    摘要翻译： 本发明提供了共用共用电容器的集成和模数转换电路。 该电路包括第一电容器阵列模块，第二电容器模块，积分电路，模数转换（ADC）逻辑。 第一电容器阵列模块具有多个电容器。 第二电容器阵列模块具有多个电容器。 集成电路被配置为由所述第一或所述第二电容器阵列模块集成模拟信号。 ADC逻辑被配置为将所述第一或所述第二电容器阵列模块的输出转换为数字信号。 当所述积分电路由所述第二电容器阵列模块进行积分时，所述ADC逻辑执行由所述第一电容器阵列模块进行的转换，并且所述ADC逻辑在所述积分电路执行所述第一电容器阵列模块的集成时执行所述第二电容器阵列模块的转换。

    SIGNAL TRANSMIT CHANNEL INTEGRATED WITH ESD PROTECTION AND A TOUCH SYSTEM
    4.
    发明申请
    SIGNAL TRANSMIT CHANNEL INTEGRATED WITH ESD PROTECTION AND A TOUCH SYSTEM 有权
    信号发射信道与ESD保护和触摸系统集成

    公开(公告)号：US20160156177A1

    公开(公告)日：2016-06-02

    申请号：US14680523

    申请日：2015-04-07

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： H02H9/04 ,  G06F3/041

    CPC分类号： G06F3/041 ,  G06F3/0416 ,  G06F2203/04107

    摘要： A signal transmit (TX) channel integrated with electrostatic discharge (ESD) protection includes a transmit switch having a first end coupled to receive a transmit signal, and being controlled by an associated scanning signal such that the transmit switch is closed to pass the transmit signal at a specific time; and an ESD protection circuit having a first input end electrically coupled to a second end of the transmit switch and a second input end coupled to receive the associated scanning signal.

    摘要翻译： 与静电放电（ESD）保护集成的信号发射（TX）信道包括发射开关，其具有耦合以接收发射信号的第一端，并且由相关联的扫描信号控制，使得发射开关闭合以通过发射信号 在特定时间 以及ESD保护电路，其具有电耦合到所述发射开关的第二端的第一输入端和耦合以接收相关联的扫描信号的第二输入端。

    SIGNAL SENSING CIRCUIT
    5.
    发明申请
    SIGNAL SENSING CIRCUIT 有权
    信号感应电路

    公开(公告)号：US20130234875A1

    公开(公告)日：2013-09-12

    申请号：US13792786

    申请日：2013-03-11

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： H03K19/00 ,  H03M1/34

    CPC分类号： H03K19/0005 ,  G01R27/2605 ,  H03M1/34

    摘要： A signal sensing circuit converts a received current input into a voltage output and provides the voltage output to an analog-to-digital converter (ADC) to generate a digital output signal. The voltage output is associated with a circuit having a first reference impedance, and a reference voltage of the ADC is associated with a circuit having a second reference impedance, wherein the circuit having the first reference impedance and the circuit having the second reference impedance are formed by the same material, so that the ratio between the changes in the current input and the changes in the value of the digital output signal is a constant.

    摘要翻译： 信号感测电路将接收的电流输入转换成电压输出，并将电压输出提供给模数转换器（ADC）以产生数字输出信号。 电压输出与具有第一参考阻抗的电路相关联，并且ADC的参考电压与具有第二参考阻抗的电路相关联，其中形成具有第一参考阻抗的电路和具有第二参考阻抗的电路形成 通过相同的材料，使得当前输入的变化与数字输出信号的值的变化之间的比率是恒定的。

    Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof
    6.
    发明申请
    Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof 有权
    集成和模数转换电路与普通电容器及其操作方法

    公开(公告)号：US20130135133A1

    公开(公告)日：2013-05-30

    申请号：US13689870

    申请日：2012-11-30

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： H03M1/46 ,  H03M1/12

    CPC分类号： H03M1/466 ,  G11C27/024 ,  H03M1/12 ,  H03M1/1215 ,  H03M1/1225 ,  H03M1/468

    摘要： The present invention provides an integration and analog to digital conversion circuit sharing common capacitors. The circuit comprises a capacitor array module, an integration circuit, and an analog to digital conversion (ADC) logic. The capacitor array module has a plurality of capacitors. The integration circuit is configured to integrate an analog signal by the capacitor array module. The ADC logic is configured to convert the output of the capacitor array module to a digital signal.

    摘要翻译： 本发明提供了共用共用电容器的集成和模数转换电路。 电路包括电容器阵列模块，积分电路和模数转换（ADC）逻辑。 电容器阵列模块具有多个电容器。 集成电路被配置为通过电容器阵列模块集成模拟信号。 ADC逻辑被配置为将电容器阵列模块的输出转换为数字信号。

    FINGERPRINT IDENTIFICATION CHIP WITH ENHANCED ESD PROTECTION
    7.
    发明申请
    FINGERPRINT IDENTIFICATION CHIP WITH ENHANCED ESD PROTECTION 有权
    指纹识别芯片，具有增强的ESD保护

    公开(公告)号：US20160154989A1

    公开(公告)日：2016-06-02

    申请号：US14678645

    申请日：2015-04-03

    申请人： EGALAX_EMPIA TECHNOLOGY INC.

    发明人： PO-CHUAN LIN

    IPC分类号： G06K9/00

    CPC分类号： G06K9/00053

    摘要： A fingerprint identification chip with enhanced ESD protection includes receiving pads disposed on a surface of a chip and arranged in a matrix format. The receiving pad has a central region and a peripheral region which surrounds at least an edge of the central region. The peripheral region of the receiving pad is higher than the central region.

    摘要翻译： 具有增强的ESD保护的指纹识别芯片包括设置在芯片的表面上并以矩阵形式布置的接收焊盘。 接收垫具有围绕中心区域的至少边缘的中心区域和周边区域。 接收垫的周边区域高于中央区域。

    ESD PROTECTION DEVICE STRUCTURE COMPATIBLE WITH CMOS PROCESS
    9.
    发明申请
    ESD PROTECTION DEVICE STRUCTURE COMPATIBLE WITH CMOS PROCESS 审中-公开

    公开(公告)号：US20190206857A1

    公开(公告)日：2019-07-04

    申请号：US15986245

    申请日：2018-05-22

    申请人： eGalax_eMPIA Technology Inc.

    发明人： PO-CHUAN LIN ,  SHR-HAU SHIUE

    IPC分类号： H01L27/02 ,  H02H9/04 ,  H01L29/10 ,  H01L27/088 ,  H01L23/528 ,  H01L23/58

    摘要： An ESD protection device structure compatible with CMOS process is disclosed. In the ESD protection device structure, a power source I/O unit or a signal I/O unit of an I/O circuit is electrically connected to an electrostatic discharge clamp circuit including multiple low-voltage PMOS structure are formed in the P-type substrate and connected in series. Source and gate on low voltage N-type well of first low-voltage PMOS structure are electrically connected to a high-voltage power terminal pad through a first power line, or electrically connected to a signal transmission terminal pad through a signal transmission line, and drain of final low-voltage PMOS structure is electrically connected to a high voltage ground terminal pad through second power line. The ESD protection device structure using the serially-connected low-voltage PMOS structures only, can use the circuit layout area more efficiently and provide high ESD tolerance.