BPSK demodulator
    1.
    发明授权

    公开(公告)号:US09634873B1

    公开(公告)日:2017-04-25

    申请号:US15146368

    申请日:2016-05-04

    CPC分类号: H04L27/2275 H03D3/00

    摘要: The present invention discloses BPSK demodulator, which uses a delay circuit to delay a BPSK signal and mixes the delayed BPSK signal with the undelayed BPSK signal to output a demodulated data signal, and which uses a phase rotation circuit and the demodulated data signal to obtain a carrier clock signal. The operating frequency of the delay circuit is the same as or 0.5 times the carrier frequency. Therefore, the present invention consumes less power and is realized by digital circuits and analog circuits.

    Methods and devices for communications systems using multiplied rate transmission
    2.
    发明授权
    Methods and devices for communications systems using multiplied rate transmission 有权
    使用倍率传输的通信系统的方法和设备

    公开(公告)号:US09473332B2

    公开(公告)日:2016-10-18

    申请号:US14396988

    申请日:2013-04-29

    摘要: Cost, electronic circuitry limitations, and communication channel behavior yield communication systems with strict bandwidth constraints. Hence, maximally utilizing available bandwidth is crucial, for example in wireless networks, to supporting ever increasing numbers of users and their demands for increased data volumes, low latency, and high download speeds. Accordingly, it would be beneficial for such networks to support variable bandwidth allocations such that smaller frequency sub-bands are allocated to users, as their number increases, but the individual users/nodes insert more data-carrying signals in order to compensate for the loss of operating bandwidth arising from the accommodation of more users. It would further be beneficial for transmitters and receivers according to embodiments of such a network architecture to be based upon low cost design methodologies allowing their deployment within a wide range of applications including high volume, low cost consumer electronics for example.

    摘要翻译: 成本,电子电路限制和通信信道行为产生具有严格带宽限制的通信系统。 因此,最大限度地利用可用带宽是至关重要的,例如在无线网络中,以支持越来越多的用户以及对增加数据量,低延迟和高下载速度的需求。 因此,这样的网络将有利于支持可变带宽分配,使得较小的频率子带被分配给用户,因为它们的数量增加,但是各个用户/节点插入更多的数据携带信号以补偿丢失 的运营带宽是由于更多用户的住宿。 根据这种网络架构的实施例,发射机和接收机将进一步有利于基于低成本设计方法,从而允许其在包括大容量,低成本消费电子设备在内的宽范围的应用中部署。

    Broadband frequency detector
    3.
    发明授权
    Broadband frequency detector 有权
    宽带频率检测器

    公开(公告)号:US09377526B2

    公开(公告)日:2016-06-28

    申请号:US14758858

    申请日:2014-01-07

    申请人: DJP CO., LTD.

    摘要: Provided is a broadband frequency detector, more particularly, to a frequency detector detecting all the signals for guiding the safe vehicle operation, and radar signals for determining vehicle speeds. The broadband frequency detector comprises: a horn antenna configured to receive signals having specific frequencies; a first amplifier configured to receive the signals having specific frequencies from the horn antenna; a mixer unit configured to receive signals from the first amplifier, wherein the signals are low noise amplified therein; and a second amplifier, arranged in parallel with the amplifier, for transferring signals to the mixer unit after low noise amplifying the signal received from the horn antenna, wherein the second amplifier includes a transistor and a first microwave circuit unit for matching the impedance of the horn antenna and the impedance of the transistor.

    摘要翻译: 提供了宽带频率检测器,更具体地,涉及检测用于引导安全车辆操作的所有信号的频率检测器和用于确定车辆速度的雷达信号。 宽带频率检测器包括:喇叭天线,被配置为接收具有特定频率的信号; 第一放大器,被配置为从喇叭天线接收具有特定频率的信号; 混频器单元,被配置为从第一放大器接收信号,其中信号被低噪声放大; 以及与所述放大器并联布置的第二放大器,用于在从所述喇叭天线接收的信号低噪声放大之后将信号传送到所述混频器单元,其中所述第二放大器包括晶体管和第一微波电路单元, 喇叭天线和晶体管的阻抗。

    Blind I/Q mismatch compensation with receiver non-linearity
    4.
    发明授权
    Blind I/Q mismatch compensation with receiver non-linearity 有权
    盲接I / Q失配补偿与接收器非线性

    公开(公告)号:US09042487B2

    公开(公告)日:2015-05-26

    申请号:US13584804

    申请日:2012-08-13

    CPC分类号: H04L27/3863 H04B1/0039

    摘要: Apparatus and methods disclosed herein perform gain, clipping, and phase compensation in the presence of I/Q mismatch in quadrature RF receivers. Gain and phase mismatch are exacerbated by differences in clipping between I & Q signals in low resolution ADCs. Signals in the stronger channel arm are clipped differentially more than weaker signals in the other channel arm. Embodiments herein perform clipping operations during iterations of gain mismatch calculations in order to balance clipping between the I and Q channel arms. Gain compensation coefficients are iteratively converged, clipping levels are established, and data flowing through the network is gain and clipping compensated. A compensation phase angle and phase compensation coefficients are then determined from gain and clipping compensated sample data. The resulting phase compensation coefficients are applied to the gain and clipping corrected receiver data to yield a gain, clipping, and phase compensated data stream.

    摘要翻译: 在正交RF接收机中存在I / Q失配的情况下,本文公开的装置和方法执行增益,限幅和相位补偿。 由于低分辨率ADC中I&Q信号之间的限幅差异,增益和相位失配加剧。 更强的信道臂中的信号比另一个信道臂中的较弱的信号差分地被削波。 本文实施例在增益失配计算的迭代期间执行削波操作,以平衡I和Q通道臂之间的限幅。 增益补偿系数迭代收敛,建立限幅电平,流经网络的数据得到增益和限幅补偿。 然后从增益和削波补偿采样数据确定补偿相位角和相位补偿系数。 所得到的相位补偿系数被应用于增益和限幅校正的接收机数据,以产生增益,限幅和相位补偿的数据流。

    Clock glitch detection circuit
    5.
    发明授权
    Clock glitch detection circuit 有权
    时钟毛刺检测电路

    公开(公告)号:US09024663B2

    公开(公告)日:2015-05-05

    申请号:US14015519

    申请日:2013-08-30

    CPC分类号: G06F1/04 H03K5/1252

    摘要: In a first circuit for detecting clock glitches in a clock signal, a master counter is clocked by the clock signal and memorizes a master count. An incrementer advances the master count by one increment. A slave counter is clocked by the clock signal and memorizes a slave count. The slave count is retarded relative to the master count by at least a particular number of clock edges. A comparator determines whether the difference between the master count and the slave count is at least a value of the incrementer times the particular number of clock edges.

    摘要翻译: 在用于检测时钟信号中的时钟毛刺的第一电路中,主计数器由时钟信号计时,并存储主计数。 增量器将主计数递增一个增量。 从计数器由时钟信号计时,并存储从计数。 从计数相对于主计数延迟至少一定数量的时钟沿。 比较器确定主计数和从计数之间的差是否至少是递增器的值乘以特定数量的时钟边沿。

    Method and system for adaptively identifying signal bandwidth
    6.
    发明授权
    Method and system for adaptively identifying signal bandwidth 有权
    自动识别信号带宽的方法和系统

    公开(公告)号:US08983003B2

    公开(公告)日:2015-03-17

    申请号:US13637956

    申请日:2010-03-31

    CPC分类号: H04L27/0006 H04L27/38

    摘要: The present invention discloses a method and system for adaptively identifying signal bandwidth. The method includes: performing digitizing intermediate frequency processing to the received signal and outputting in-phase/quadrature (I/Q) signals; identifying signal bandwidth of the I/Q signals according to at least two signal identification templates and outputting the synchronized signal flows after a successful identification. A system for adaptively identifying signal bandwidth is also disclosed. The present invention can be compatible with at least two bandwidth modes, and the software can automatically perform identification and switch of the modulation bandwidth, when manual invention is not necessary and the operation is simple.

    摘要翻译: 本发明公开了一种用于自适应地识别信号带宽的方法和系统。 该方法包括:对接收信号进行数字化中频处理,并输出同相/正交(I / Q)信号; 根据至少两个信号识别模板识别I / Q信号的信号带宽,并在成功识别之后输出同步的信号流。 还公开了一种用于自适应地识别信号带宽的系统。 本发明可以兼容至少两种带宽模式,并且当不需要手动发明并且操作简单时,软件可以自动执行调制带宽的识别和切换。

    Methods and systems for programmable digital down-conversion
    8.
    发明授权
    Methods and systems for programmable digital down-conversion 有权
    可编程数字下变频的方法和系统

    公开(公告)号:US08948291B2

    公开(公告)日:2015-02-03

    申请号:US13130211

    申请日:2010-11-18

    CPC分类号: H04L25/02 H04L27/06 H04L27/38

    摘要: A radio communication apparatus operable over a wide range of frequencies including a signal processing device is provided. The device performs an analog to digital conversion at a predetermined sample rate independent of a selected frequency band within the wide range of frequencies to generate a digital signal, and digitally processes the digital signal to output a data signal at baseband associated with the selected frequency band.

    摘要翻译: 提供了可在包括信号处理装置的宽频率范围内工作的无线电通信装置。 该器件以宽频率范围内的所选频带独立于预定采样速率进行模数转换,以产生数字信号,并对数字信号进行数字处理以输出与所选频带相关联的数据信号 。

    Dual channel reception
    9.
    发明授权
    Dual channel reception 有权
    双频道接收

    公开(公告)号:US08903022B2

    公开(公告)日:2014-12-02

    申请号:US13127682

    申请日:2009-11-04

    IPC分类号: H03K9/06 H04L5/06

    摘要: There is provided a solution for simultaneous reception of dual channel transmission. The solution is based on applying a first and a second oscillating signals, mixing and adding in order to separate the in-phase and quadrature components of first and second signals from a combined radio frequency signal received as input.

    摘要翻译: 提供了用于同时接收双通道传输的解决方案。 该解决方案基于施加第一和第二振荡信号,混合和相加,以便从作为输入接收的组合射频信号中分离第一和第二信号的同相和正交分量。

    Method and apparatus for calibrating low frequency clock
    10.
    发明授权
    Method and apparatus for calibrating low frequency clock 有权
    用于校准低频时钟的方法和装置

    公开(公告)号:US08872548B2

    公开(公告)日:2014-10-28

    申请号:US14034909

    申请日:2013-09-24

    发明人: Dongsheng Liu Yu Liu

    IPC分类号: H03K9/06 H04W52/02

    摘要: A method and an apparatus for calibrating a low frequency clock are disclosed. The method includes: calculating a frequency of a low frequency clock in a current low frequency clock calibration; and calculating an average value of low frequency clock frequencies in n clock calibrations before the current calibration, where n is greater than 1 and is an integer; judging whether a difference between the frequency of the low frequency clock in the current low frequency clock calibration and the average value is smaller than a preset threshold for the difference; and if the difference between the frequency of the low frequency clock in the current low frequency clock calibration and the average value is smaller than the preset threshold for the difference, calculating the number of sleep cycles according to the calculated and obtained frequency of the low frequency clock in the current low frequency clock calibration.

    摘要翻译: 公开了一种用于校准低频时钟的方法和装置。 该方法包括:在当前低频时钟校准中计算低频时钟的频率; 并计算在当前校准之前的n个时钟校准中的低频时钟频率的平均值,其中n大于1并且是整数; 判断当前低频时钟校准中的低频时钟的频率与平均值之间的差是否小于所述差的预设阈值; 并且如果当前低频时钟校准中的低频时钟的频率与平均值之间的差小于所述差的预设阈值,则根据所计算和获得的低频频率来计算睡眠周期数 时钟在当前低频时钟校准。