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122 条记录 (耗时 0.02 秒)

    Liquid crystal display panel and method of fabricating the same
    92.
    发明申请
    Liquid crystal display panel and method of fabricating the same 有权
    液晶显示面板及其制造方法

    公开(公告)号：US20050110937A1

    公开(公告)日：2005-05-26

    申请号：US10973168

    申请日：2004-10-26

    申请人： Ji Yoon ,  Ho Jeong

    发明人： Ji Yoon ,  Ho Jeong

    IPC分类号： G02F1/1339

    CPC分类号： G02F1/13394

    摘要： A liquid crystal display panel and a method of fabricating the same capable of preventing a gravity defect of the liquid crystal display panel to improve the picture quality are disclosed. A liquid crystal display panel includes a sealant for combining a first substrate and a second substrate. One side of the sealant is located in a direction opposite to a gravity direction and has a concavo-convex shape.

    摘要翻译： 公开了一种液晶显示面板及其制造方法，其能够防止液晶显示面板的重力缺陷以提高图像质量。 液晶显示面板包括用于组合第一基板和第二基板的密封剂。 密封剂的一侧位于与重力方向相反的方向上并具有凹凸形状。

    Methods of manufacturing a magnetoresistive random access memory device
    93.
    发明授权
    Methods of manufacturing a magnetoresistive random access memory device 有权
    制造磁阻随机存取存储器件的方法

    公开(公告)号：US09306156B2

    公开(公告)日：2016-04-05

    申请号：US14533084

    申请日：2014-11-04

    申请人： Eun-Sun Noh ,  Jong-Chul Park ,  Shin Kwon ,  Hyung-Joon Kwon ,  Chae-Lyoung Kim ,  Hye-Ji Yoon

    发明人： Eun-Sun Noh ,  Jong-Chul Park ,  Shin Kwon ,  Hyung-Joon Kwon ,  Chae-Lyoung Kim ,  Hye-Ji Yoon

    IPC分类号： H01L43/12 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

    CPC分类号： H01L43/12 ,  H01L27/222 ,  H01L27/228 ,  H01L43/08

    摘要： In a method of manufacturing an MRAM device, a first sacrificial layer, an etch stop layer, and a second sacrificial layer are sequentially formed on a substrate and then partially etched to form openings therethrough. Lower electrodes are formed to fill the openings. The first and second sacrificial layers and portions of the etch stop layer are removed to form etch stop layer patterns surrounding upper portions of sidewalls of the lower electrodes, respectively. An upper insulating layer pattern is formed between the etch stop layer patterns to partially define an air pad between the lower electrodes. A first magnetic layer, a tunnel barrier layer, a second magnetic layer, and an upper electrode layer are formed, and are etched to form a plurality of magnetic tunnel junction (MTJ) structures. Each MTJ structure includes a sequentially stacked first magnetic layer pattern, tunnel layer pattern, and second magnetic layer pattern, and each of the MTJ structures contacts a corresponding one of the lower electrodes.

    摘要翻译： 在制造MRAM器件的方法中，第一牺牲层，蚀刻停止层和第二牺牲层依次形成在衬底上，然后被部分蚀刻以形成通过其的开口。 形成下电极以填充开口。 去除第一和第二牺牲层和蚀刻停止层的部分以分别形成围绕下部电极的侧壁的上部的蚀刻停止层图案。 在蚀刻停止层图案之间形成上部绝缘层图案，以在下部电极之间部分地限定气垫。 形成第一磁性层，隧道势垒层，第二磁性层和上电极层，并被蚀刻以形成多个磁性隧道结（MTJ）结构。 每个MTJ结构包括顺序堆叠的第一磁性层图案，隧道层图案和第二磁性层图案，并且每个MTJ结构接触相应的一个下部电极。

    LAYOUT METHOD OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR DEVICE
    94.
    发明申请
    LAYOUT METHOD OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR DEVICE 审中-公开
    半导体器件的布局方法和形成半导体器件的方法

    公开(公告)号：US20160042111A1

    公开(公告)日：2016-02-11

    申请号：US14716604

    申请日：2015-05-19

    申请人： JI-YOON CHANG

    发明人： JI-YOON CHANG

    IPC分类号： G06F17/50 ,  H01L21/311 ,  H01L23/528 ,  H01L21/768

    CPC分类号： G06F17/5077 ,  G06F17/5068 ,  G06F17/5072 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582

    摘要： A layout method for use in fabricating a semiconductor device includes creating a contact layout including cell contact layouts and peripheral contact layouts using a computer, and creating an interconnection layout including cell interconnection layouts and peripheral interconnection layouts using the computer. The interconnection layout includes a plurality of line layouts and bride layouts. The line layouts include cell interconnection layouts and peripheral line layouts. The peripheral line layouts include a first peripheral line layout and a second peripheral line layout adjacent to each other, and the peripheral contact layouts include a misaligned contact layout interposed between the first and second peripheral line layouts. The bridge layout connects the first and second peripheral line layouts and overlaps the misaligned contact layout. In the method, the second peripheral line layout is divided along its length.

    摘要翻译： 用于制造半导体器件的布局方法包括使用计算机创建包括单元接触布局和外围接触布局的接触布局，以及使用该计算机创建包括单元互连布局和外围互连布局的互连布局。 互连布局包括多个线路布局和新娘布局。 线路布局包括单元互连布局和外围线路布局。 外围线布局包括彼此相邻的第一外围线布局和第二外围线布局，并且外围接触布局包括插入在第一和第二外围布线布局之间的未对准的接触布局。 桥接布局连接第一和第二外围线路布局，并与未对齐的接触布局重叠。 在该方法中，沿其长度划分第二周边线布局。

    METHODS OF MANUFACTURING A MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE
    95.
    发明申请
    METHODS OF MANUFACTURING A MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE 有权
    制造磁阻随机访问存储器件的方法

    公开(公告)号：US20150236251A1

    公开(公告)日：2015-08-20

    申请号：US14533084

    申请日：2014-11-04

    申请人： Eun-Sun NOH ,  Jong-Chul PARK ,  Shin KWON ,  Hyung-Joon KWON ,  Chae-Lyoung KIM ,  Hye-Ji YOON

    发明人： Eun-Sun NOH ,  Jong-Chul PARK ,  Shin KWON ,  Hyung-Joon KWON ,  Chae-Lyoung KIM ,  Hye-Ji YOON

    IPC分类号： H01L43/12 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

    CPC分类号： H01L43/12 ,  H01L27/222 ,  H01L27/228 ,  H01L43/08

    摘要： In a method of manufacturing an MRAM device, a first sacrificial layer, an etch stop layer, and a second sacrificial layer are sequentially formed on a substrate and then partially etched to form openings therethrough. Lower electrodes are formed to fill the openings. The first and second sacrificial layers and portions of the etch stop layer are removed to form etch stop layer patterns surrounding upper portions of sidewalls of the lower electrodes, respectively. An upper insulating layer pattern is formed between the etch stop layer patterns to partially define an air pad between the lower electrodes. A first magnetic layer, a tunnel barrier layer, a second magnetic layer, and an upper electrode layer are formed, and are etched to form a plurality of magnetic tunnel junction (MTJ) structures. Each MTJ structure includes a sequentially stacked first magnetic layer pattern, tunnel layer pattern, and second magnetic layer pattern, and each of the MTJ structures contacts a corresponding one of the lower electrodes.

    摘要翻译： 在制造MRAM器件的方法中，第一牺牲层，蚀刻停止层和第二牺牲层依次形成在衬底上，然后被部分蚀刻以形成通过其的开口。 形成下电极以填充开口。 去除第一和第二牺牲层和蚀刻停止层的部分以分别形成围绕下部电极的侧壁的上部的蚀刻停止层图案。 在蚀刻停止层图案之间形成上部绝缘层图案，以在下部电极之间部分地限定气垫。 形成第一磁性层，隧道势垒层，第二磁性层和上电极层，并被蚀刻以形成多个磁性隧道结（MTJ）结构。 每个MTJ结构包括顺序堆叠的第一磁性层图案，隧道层图案和第二磁性层图案，并且每个MTJ结构接触相应的一个下部电极。

    DIY SHOE
    98.
    发明申请
    DIY SHOE 审中-公开

    公开(公告)号：US20130160325A1

    公开(公告)日：2013-06-27

    申请号：US13338232

    申请日：2011-12-27

    申请人： Ji Yoon MOON

    发明人： Ji Yoon MOON

    IPC分类号： A43B3/24

    CPC分类号： A43B1/0027 ,  A43B3/0078 ,  A43B3/103 ,  A43B3/105 ,  A43B3/122 ,  A43B3/126 ,  A43B3/242

    摘要： Disclosed herein is a DIY shoe. The shoe includes a bottom sole which has a through hole therein, and at least one cover which is removably coupled to the bottom sole. The cover includes a connection part which is inserted into the through hole of the bottom sole, and a locking part which is provided on the connection part. The through hole has a shape of a slot of which a longitudinal length is longer than a lateral length. The locking part has a non-circular shape in which a longitudinal length of the locking part is equal to or less than the longitudinal length of the through hole and a lateral length of the locking part is greater than the longitudinal length of the locking part so that the locking part is easily inserted into the through hole but not easily removed therefrom.

    摘要翻译： 这里公开了一种DIY鞋。 该鞋包括在其中具有通孔的底部鞋底和至少一个可移除地联接到底部鞋底的罩。 所述盖包括插入所述底底的通孔中的连接部，以及设置在所述连接部上的锁定部。 通孔具有纵向长度长于横向长度的槽的形状。 锁定部件具有非圆形形状，其中锁定部件的纵向长度等于或小于通孔的纵向长度，并且锁定部件的横向长度大于锁定部件的纵向长度，因此 锁定部件容易地插入到通孔中，但是不容易从其中移除。