Compaction Package
    91.
    发明申请
    Compaction Package 审中-公开
    压实包

    公开(公告)号:US20090238498A1

    公开(公告)日:2009-09-24

    申请号:US12050426

    申请日:2008-03-18

    Applicant: Kevin Lin

    Inventor: Kevin Lin

    CPC classification number: B65D75/002 B65D75/28

    Abstract: Provided is a compaction package that includes a flexible film portion and a heat shrink film portion coupled to part of the flexible film portion. The compaction package has a bottom, a sidewall, and an open top that together define a hollow interior space adapted to receive and contain a granular material. In a first configuration prior to exposure to a heat source sufficient to raise the temperature of the compaction package to a certain critical heat shrink temperature, the interior space of the compaction package has a first volume. In a second configuration after exposure to the heat source, the interior space of the compaction package has a second volume that is less than the first volume.

    Abstract translation: 提供了一种压实包装,其包括柔性膜部分和耦合到柔性膜部分的一部分的热收缩膜部分。 压实包装具有底部,侧壁和开口顶部,其一起限定适于接收和容纳颗粒材料的中空内部空间。 在暴露于足以将压实包装的温度升高到某一临界热收缩温度的热源之前的第一配置中,压实包装的内部空间具有第一容积。 在暴露于热源之后的第二配置中,压缩包装的内部空间具有小于第一容积的第二容积。

    Lead plating method for GMR head manufacture
    93.
    发明授权
    Lead plating method for GMR head manufacture 失效
    GMR头制造的铅电镀方法

    公开(公告)号:US06973712B2

    公开(公告)日:2005-12-13

    申请号:US10093106

    申请日:2002-03-07

    Abstract: A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.

    Abstract translation: GMR结构的Lead Overlay设计中的一个主要问题是磁性读取磁道宽度比物理读取磁道宽度宽。 这是由于引线和GMR层之间的高界面电阻,这是现有技术方法的不可避免的副作用。 本发明使用在湿蚀刻之前的电镀来制造引线。 该方法仅需要在GMR层上的薄保护层,以确保接口电阻最小。 使用湿表面清洁可以避免溅射缺陷,电镀与此相容,因此清洁表面被保留只需要一个光刻步骤来定义轨道,因为没有重新沉积。

    Ear thermometer probe structure
    95.
    发明授权
    Ear thermometer probe structure 失效
    耳温度计探头结构

    公开(公告)号:US06749334B2

    公开(公告)日:2004-06-15

    申请号:US10215002

    申请日:2002-08-09

    Applicant: Kevin Lin

    Inventor: Kevin Lin

    CPC classification number: G01J5/04 G01J5/049 G01J5/06 G01J5/08 G01J5/0818

    Abstract: An ear thermometer probe structure comprises a shell body. A hollow thermal absorption component is disposed in the shell body, and contacts several positioning points one the inner wall of the shell body. An air gap is formed at the part of the thermal absorption component not contacting the shell body. A wave guide is disposed in the thermal absorption component. The rear section of the wave guide tightly contacts the thermal absorption component, and the front section thereof is separated from the shell body by an air gap. A filter is disposed at the front end of the wave guide to let infrared rays be transmitted. An annular sealing pad is located between the filter and the top of the shell body. A sensor is disposed behind the wave guide and fixed on the thermal absorption component. The sensor is separated from the thermal absorption component and the wave guide by an annular air room.

    Abstract translation: 耳温度计探针结构包括壳体。 中空热吸收部件设置在壳体中,并且与壳体的内壁一个接触多个定位点。 在不接触壳体的热吸收部件的部分形成气隙。 波导装置设置在热吸收部件中。 波导的后部与热吸收部件紧密接触,其前部通过气隙与壳体分离。 滤波器设置在波导的前端,以便传输红外线。 环形密封垫位于过滤器和壳体顶部之间。 传感器设置在波导的后面并固定在吸热部件上。 传感器由环形空气室与热吸收部件和波导分开。

    Method of fabricating small dimension wires
    96.
    发明授权
    Method of fabricating small dimension wires 失效
    制造小尺寸电线的方法

    公开(公告)号:US6150263A

    公开(公告)日:2000-11-21

    申请号:US188920

    申请日:1998-11-09

    CPC classification number: H01L21/76885

    Abstract: A method of forming small dimension wires by an isotropic removal process. The method provides a substrate with an insulation layer. A first conductive layer and a second conductive layer are formed on the insulation layer. A wire pattern is formed on a photoresist layer after the coating process and the sequential exposure and development process. Part of the second conductive layer is removed by using the wire pattern on the photoresist layer as a mask, and thus part of the second conductive layer with wires is remained. Isotropic etching the peripheral part of the second conductive layer and thus the part of wire pattern with a smaller dimension is remained. Using the wire pattern with a smaller dimension as a mask to anisotropic etch the first conductive layer until the surface of the insulation layer is exposed, and thus the process of fabricating small dimension is finished.

    Abstract translation: 通过各向同性去除方法形成小尺寸线的方法。 该方法提供具有绝缘层的基板。 第一导电层和第二导电层形成在绝缘层上。 在涂布工艺和顺序曝光和显影处理之后,在光致抗蚀剂层上形成线图案。 通过使用光致抗蚀剂层上的线图案作为掩模来去除部分第二导电层,因此残留了具有导线的第二导电层的一部分。 残留了各向同性蚀刻第二导电层的周边部分,因此保留了具有较小尺寸的线图案的部分。 使用较小尺寸的导线图案作为掩模以对第一导电层进行各向异性蚀刻,直到绝缘层的表面露出,从而完成制造小尺寸的工艺。

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