公开(公告)号：US20040218439A1

公开(公告)日：2004-11-04

申请号：US10766291

申请日：2004-01-26

Applicant: STMicroelectronics S.A.

Inventor： Michel Harrand ,  Joseph Bulone

IPC: G11C007/00

CPC classification number: G11C11/40615 ,  G11C11/406 ,  G11C2211/4061

Abstract: The content of a few pages of the dynamic random access memory is backed up, then one tries to refresh them less quickly, for example two times less quickly, and one observes whether this does or does not cause errors. The operation is repeated on the entire memory. Depending on the number of errors that have appeared on the pages refreshed less often, the refresh period is decreased or increased. Thus, the memory self-adjusts its refresh period to what is necessary for it.

Abstract translation: 对动态随机存取存储器的几页内容进行备份，然后尝试快速刷新它们，例如快速刷新两次，一次观察是否会导致错误。 在整个存储器上重复操作。 根据刷新页面上出现的错误次数不同，刷新周期减少或增加。 因此，内存将自己的刷新周期自动调整到需要的时间。

公开(公告)号：US20040217305A1

公开(公告)日：2004-11-04

申请号：US10778323

申请日：2004-02-13

Applicant: STMicroelectronics S.A.

Inventor： Jean-Pierre Schoellkopf ,  Herve Jaouen

IPC: G21G005/00

CPC classification number: H01L21/76807 ,  H01L21/76801 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of repairing a defect in an integrated electronic circuit caused by an incorrect lithographic mask includes the formation of an electrical isolation between two conducting parts of the circuit. The electrical isolation is obtained by at least partly filling, with an electrically insulating material, a volume hollowed out beforehand which would otherwise, and incorrectly, form an electrical connection between the two conducting parts. To do this, a mask having an aperture revealing the hollowed out volume is formed on the circuit, and the mask used to direct the filling of the electrically insulating material and correction of the lithography defined defect.

Abstract translation: 修复由不正确的光刻掩模引起的集成电子电路中的缺陷的方法包括在电路的两个导电部分之间形成电隔离。 电隔离是通过用电绝缘材料至少部分地填充预先挖空的体积获得的，否则并且不正确地在两个导电部件之间形成电连接。 为此，在电路上形成具有露出掏空体积的孔径的掩模，以及用于引导电绝缘材料的填充的掩模和校正光刻限定的缺陷。

公开(公告)号：US20040213035A1

公开(公告)日：2004-10-28

申请号：US10775032

申请日：2004-02-09

Applicant: STMicroelectronics S.A.

Inventor： Paola Cavaleri ,  Bruno Leconte ,  Sebastien Zink

IPC: G11C011/00

CPC classification number: G11C16/3431 ,  G11C16/16 ,  G11C16/3418 ,  G11C16/349

Abstract: The present invention relates to a method for controlling and for refreshing memory cells in an electrically erasable and programmable memory comprising a memory array organized in sectors, each sector comprising memory cells linked to bit lines and to word lines. The method comprises controlling and refreshing memory cells of pages of the memory array the address of which is indicated by a control and refresh counter comprising data forming tokens usable once. According to the present invention, a control and refresh counter is integrated into each sector of the memory and comprises memory cells linked to the bit lines of the sector. A counter of a sector is erased after reaching a maximum counting value that is chosen so that, when this maximum counting value is reached, memory cells of the counter have undergone a number of electrical stress cycles that is at the most equal to a determined number. Application to Flash memories.

Abstract translation: 本发明涉及一种用于控制和刷新电可擦除可编程存储器中的存储器单元的方法，该存储器单元包括以扇区组织的存储器阵列，每个扇区包括链接到位线和字线的存储器单元。 该方法包括控制和刷新存储器阵列的存储单元，其存储单元的地址由包括可使用一次的令牌的数据形成的控制和刷新计数器指示。 根据本发明，控制和刷新计数器被集成到存储器的每个扇区中，并且包括链接到扇区的位线的存储器单元。 在达到选择的最大计数值之后擦除扇区的计数器，使得当达到该最大计数值时，计数器的存储单元已经经历了多个等于确定数量的电应力循环 。 应用于闪存。

公开(公告)号：US20040193667A1

公开(公告)日：2004-09-30

申请号：US10743274

申请日：2003-12-22

Applicant: STMicroelectronics S.A.

Inventor： Denis Lehongre

IPC: G06F017/14

CPC classification number: G06F7/22 ,  G11B20/1426 ,  H03H17/0263 ,  H03M5/00 ,  H03M5/04 ,  H03M5/145 ,  H03M7/46

Abstract: Device for processing digital data and, more particularly, for reading out the maximum or minimum value of data belonging to a set of 2n codes in which a relation of order is established and in which each of said data has a rank R comprised between 0 and 2nnull1. The device includes a conversion circuit for each digital data to be processed, which circuit generates a transform which is a binary number composed of 2nnull1 binary elements Tnullxnull with xnull1 to 2nnull1Tnull2nnull1nullTnull2nnull2null . . . Tnullxnull . . . Tnull2nullTnull1nullin which T(x)null0 when x is strictly higher than R and T(x)null1 when x is lower or equal to R. The result of the conversions is received by circuits that carry out a digital processing thereof.

Abstract translation: 更具体地说，用于读出属于其中建立了顺序关系并且其中每个所述数据具有等级R的2 代码的集合的数据的最大值或最小值的装置 介于0和2 -1之间。 该装置包括用于要处理的每个数字数据的转换电路，该电路产生一个二进制数变换，该二进制数由x = 1至2 -1的2 -1个二进制元素T [x]组成 [2 -1] T [2n -2]。 。 。 T [x]。 。 。 当x低于或等于R时，当x严格高于R且T（x）= 1时，T [2] T [1]其中T（x）= 0。转换的结果由携带的电路 进行数字处理。

公开(公告)号：US20040174737A1

公开(公告)日：2004-09-09

申请号：US10729192

申请日：2003-12-05

Applicant: STMicroelectronics S.A.

Inventor： Philippe Graffouliere

IPC: G11C011/00

CPC classification number: G11B27/24 ,  G11B7/007 ,  G11B7/00745 ,  G11B20/10009 ,  G11B20/14 ,  G11B20/1403 ,  G11B20/18 ,  G11B27/3027 ,  G11B2220/218 ,  G11B2220/2545 ,  G11B2220/2562

Abstract: For indicating on a data medium (9) a sector referenced by a binary word (16) formed of a number M of first bytes each comprising a number L of bits, the method includes steps of etching onto the data medium locally at this sector a succession of M second bytes each corresponding to a first byte, each second byte being equal to a vector of N components, each with a value of null1 or null1, such that Nnull2Lnull1 and such that the scalar product of said vector with any other vector to which another second byte is equal, is at most equal to null1. The data medium (9) is, for example, an optical disk.

Abstract translation: 为了在数据介质（9）上指示由二进制字（16）引用的扇区，该二进制字由包括数字L位的M个第一字节组成，该方法包括以下步骤：在该扇区处本地蚀刻到数据介质上 每个对应于第一字节的M个第二字节的连续，每个第二个字节等于N个分量的向量，每个分量的值为+1或-1，使得N = 2L -1，并且使得标量 所述向量与另一个第二字节相等的任何其他向量的乘积最大等于+1。 数据媒体（9）例如是光盘。

公开(公告)号：US20040169566A1

公开(公告)日：2004-09-02

申请号：US10731978

申请日：2003-12-10

Applicant: STMicroelectronics S.A.

Inventor： Fabrice Guitton ,  Francois Dupont

IPC: H03H007/42

CPC classification number: H03H7/422 ,  H03H7/42

Abstract: A mode-switching transformer selective on a band centered on a first frequency, comprising, between a same common mode input/output terminal and respectively one of two differential mode input/output terminals, a high-pass filter with a cut-off frequency smaller than said first frequency, a band-pass filter with a central frequency greater than said first frequency.

Abstract translation: 一种在以第一频率为中心的频带上选择性的模式切换变压器，包括在相同的共模输入/输出端和两个差分模式输入/输出端之中的一个之间，具有截止频率较小的高通滤波器 具有比所述第一频率高的中心频率大于所述第一频率的带通滤波器。

公开(公告)号：US20040160311A1

公开(公告)日：2004-08-19

申请号：US10782550

申请日：2004-02-18

Applicant: STMicroelectronics S.A.

Inventor： William Orlando ,  Jean Nicolai

IPC: H03D003/24

CPC classification number: G06F21/725 ,  G06F21/10 ,  G06F2221/2135 ,  G06F2221/2137

Abstract: An electronic circuit comprising a first counter clocked by a clock signal provided to have a first period and provided by an oscillator external to the circuit, and comprising a second counter clocked with a second period by an oscillator internal to the circuit, the second counter being reset each time the content of the first counter is a multiple of a first predetermined value, and a means for activating an alert signal when the second counter reaches a second predetermined value such that the product of the second predetermined value by the second period is greater than the product of the first predetermined value by the first period.

Abstract translation: 一种电子电路，包括由提供为具有第一周期并由电路外部的振荡器提供的时钟信号时钟的第一计数器，并且包括由电路内部的振荡器以第二周期计时的第二计数器，第二计数器 每当第一计数器的内容是第一预定值的倍数时复位，以及用于当第二计数器达到第二预定值时激活警报信号的装置，使得第二预定值乘第二周期的乘积更大 比第一个预定值乘以第一个周期的乘积。

公开(公告)号：US20040160279A1

公开(公告)日：2004-08-19

申请号：US10675810

申请日：2003-09-30

Applicant: STMicroelectronics S.A.

Inventor： Philippe Jouen ,  Michael Kraemer

IPC: H03L007/00

CPC classification number: H03L7/18 ,  H03L7/0891 ,  H03L7/099

Abstract: A phase-locked loop including an oscillator, controlled by a control signal generated by a comparison circuit comparing a reference frequency and the oscillator frequency and filtered by an integrator low-pass filter; a control and adjustment circuit for, with a predetermined frequency smaller than the reference frequency, taking into account the value of the filtered controlled signal and, if this value is out of a range of predetermined values, adjusting the operating range of the oscillator; and an inhibition circuit for deactivating the comparison circuit for a predetermined duration before taking into account the value of the filtered control signal.

Abstract translation: 一种锁相环，包括由比较电路产生的控制信号控制的振荡器，比较电路比较参考频率和振荡器频率，并由积分器低通滤波器滤波; 考虑到滤波后的受控信号的值，并且如果该值在预定值的范围之外，则调整振荡器的工作范围，该控制和调整电路具有小于参考频率的预定频率。 以及抑制电路，用于在考虑滤波后的控制信号的值之前，将比较电路停止预定的持续时间。

公开(公告)号：US20040143420A1

公开(公告)日：2004-07-22

申请号：US10697792

申请日：2003-10-30

Applicant: STMicroelectronics S.A.

Inventor： Maurice Le Van Suu ,  Michel Romet

IPC: G06F015/00

CPC classification number: H02J13/0075 ,  Y02E60/7853 ,  Y04S40/126

Abstract: This invention relates to an energy management system in an energy distribution network (DSTR) comprising an energy source (SE1) and a number of energy consumers (K1, K2, K3) distributed in different consumption locations, this system comprising the installation of distributed energy operation means (RXE) and distributed information transmission means (RTI) in each consumption location, and installation of centralised distributed energy management means (CGED) and centralised information transmission means (CTI) in the network (DSTR), transmitting control signals (SC) to the distributed energy operation means (RXE) passing through the distributed information transmission means (RTI).

Abstract translation: 本发明涉及能量分配网络（DSTR）中的能量管理系统，该能量管理系统包括能量源（SE1）和分布在不同消耗位置的多个能量消耗器（K1，K2，K3），该系统包括安装分布式能量 在每个消费位置中的操作装置（RXE）和分布式信息传输装置（RTI），以及在网络（DSTR）中集中分布式能量管理装置（CGED）和集中式信息传输装置（CTI）的安装，发送控制信号（SC） 涉及通过分布式信息传输装置（RTI）的分布式能量操作装置（RXE）。

公开(公告)号：US20040114051A1

公开(公告)日：2004-06-17

申请号：US10666839

申请日：2003-09-19

Applicant: STMICROELECTRONICS S.A

Inventor： Christian Tournier

IPC: H04N005/45

CPC classification number: H04N21/43607 ,  H04N5/4401 ,  H04N5/45 ,  H04N7/163 ,  H04N21/4147 ,  H04N21/4181 ,  H04N21/4263 ,  H04N21/4316 ,  H04N21/4382 ,  H04N21/4405

Abstract: A routing device is provided for transporting digital data from demodulated digital television signals. The routing device includes a network that routes the digital data to demultiplexers via at least one decoding module. The network includes means for connecting to at least two independent demodulation channels, with each of the demodulation channels producing digital data from a demodulator. The network allows individual routing of the digital data from each of the demodulation channels to the demultiplexers via at least one decoding module. Also provided are a corresponding routing method and a host device that includes such a routing device. Exemplary applications of the routing device and method are a digital television receiver with an image incorporation (picture in picture) function, and a digital television combined with a recording device.

Abstract translation: 提供路由设备用于从解调的数字电视信号传输数字数据。 路由设备包括经由至少一个解码模块将数字数据路由到解复用器的网络。 该网络包括用于连接至少两个独立解调信道的装置，每个解调信道从解调器产生数字数据。 网络允许经由至少一个解码模块将数字数据从每个解调信道单独路由到解复用器。 还提供了相应的路由方法和包括这种路由设备的主机设备。 路由设备和方法的示例性应用是具有图像并入（画中画）功能的数字电视接收机和与记录设备组合的数字电视机。