SYSTEMS AND METHODS FOR PROVIDING REDUNDANCY IN COMMUNICATIONS NETWORKS
    91.
    发明申请
    SYSTEMS AND METHODS FOR PROVIDING REDUNDANCY IN COMMUNICATIONS NETWORKS 审中-公开
    在通信网络中提供冗余的系统和方法

    公开(公告)号:US20100325486A1

    公开(公告)日:2010-12-23

    申请号:US12871702

    申请日:2010-08-30

    IPC分类号: G06F11/07

    摘要: A system includes a first network device and a second network device. The first network device includes a group of first logical portions and is configured to detect a problem with one of the first logical portions, and transmit a message identifying the one first logical portion. The second network device includes a group of second logical portions, where the group of second logical portions corresponds to the group of first logical portions. The second network device is configured to receive the message from the first network device, and activate the one second logical portion corresponding to the one first logical portion in response to receiving the message.

    摘要翻译: 系统包括第一网络设备和第二网络设备。 第一网络设备包括一组第一逻辑部分,并且被配置为检测第一逻辑部分之一的问题,并且发送标识该第一逻辑部分的消息。 第二网络设备包括一组第二逻辑部分,其中第二逻辑部分组对应于第一逻辑部分的组。 第二网络设备被配置为从第一网络设备接收消息,并响应于接收到该消息而激活对应于该第一逻辑部分的一个第二逻辑部分。

    Systems and methods for providing redundancy in communications networks
    92.
    发明授权
    Systems and methods for providing redundancy in communications networks 有权
    在通信网络中提供冗余的系统和方法

    公开(公告)号:US07808893B1

    公开(公告)日:2010-10-05

    申请号:US11037179

    申请日:2005-01-19

    IPC分类号: H04L12/28

    摘要: A system includes a first network device and a second network device. The first network device includes a group of first logical portions and is configured to detect a problem with one of the first logical portions, and transmit a message identifying the one first logical portion. The second network device includes a group of second logical portions, where the group of second logical portions corresponds to the group of first logical portions. The second network device is configured to receive the message from the first network device, and activate the one second logical portion corresponding to the one first logical portion in response to receiving the message.

    摘要翻译: 系统包括第一网络设备和第二网络设备。 第一网络设备包括一组第一逻辑部分,并且被配置为检测第一逻辑部分之一的问题,并且发送标识该第一逻辑部分的消息。 第二网络设备包括一组第二逻辑部分,其中第二逻辑部分组对应于第一逻辑部分的组。 第二网络设备被配置为从第一网络设备接收消息,并响应于接收到该消息而激活对应于该第一逻辑部分的一个第二逻辑部分。

    PROCESS FOR PREPARING THERAPEUTIC PEPTIDE
    93.
    发明申请
    PROCESS FOR PREPARING THERAPEUTIC PEPTIDE 审中-公开
    制备治疗肽的方法

    公开(公告)号:US20100137561A1

    公开(公告)日:2010-06-03

    申请号:US12630002

    申请日:2009-12-03

    申请人: Lin Chen

    发明人: Lin Chen

    CPC分类号: C07K14/64

    摘要: This application discloses processes for synthesizing human relaxin Chain B for treatment of diseases mediated by relaxin. This application in particular discloses processes of synthesizing the Chain B of human relaxin using a solid and solution phase (“hybrid”) approach. Generally, the approach includes synthesizing three different peptide intermediate fragments using solid phase chemistry. Solution phase chemistry is then used to couple the fragments.

    摘要翻译: 本申请公开了用于治疗由松弛素介导的疾病的人松弛素B链的方法。 本申请特别公开了使用固相和溶液相(“混合”)方法合成人松弛素的链B的方法。 通常,该方法包括使用固相化学合成三种不同的肽中间体片段。 然后使用溶液相化学来连接片段。

    Insulinotropic peptide synthesis using solid and solution phase combination techniques
    94.
    发明申请
    Insulinotropic peptide synthesis using solid and solution phase combination techniques 失效
    使用固相和溶液相组合技术的胰岛素肽合成

    公开(公告)号:US20090292108A1

    公开(公告)日:2009-11-26

    申请号:US12316309

    申请日:2008-12-11

    IPC分类号: C07K1/02 C07K14/00 C07K7/06

    CPC分类号: C07K14/605

    摘要: The present invention relates to the preparation of insulinotropic peptides that are synthesized using a solid and solution phase (“hybrid”) approach. Generally, the approach includes synthesizing three different peptide intermediate fragments using solid phase chemistry. Solution phase chemistry is then used to add additional amino acid material to the third fragment which is then coupled to the second fragment and then the first fragment in solution. Alternatively, a different second fragment is coupled to the first fragment in the solid phase. Then, solution phase chemistry is then used to add additional amino acid material to a different third fragment. Subsequently, this different third fragment is coupled to the coupled first and different second fragment in the solution phase. The use of a pseudoproline in one of the fragments eases solid phase synthesis of that fragment and also eases subsequent solution phase coupling of this fragment to the other fragments. The present invention is very useful for forming insulinotropic peptides such as GLP-1(7-36) and its natural and non-natural counterparts.

    摘要翻译: 本发明涉及使用固相和溶液相(“混合”)方法合成的促胰岛素肽的制备。 通常,该方法包括使用固相化学合成三种不同的肽中间体片段。 然后使用溶液相化学为第三片段添加另外的氨基酸材料,然后将其与第二片段偶联,然后与溶液中的第一片段偶联。 或者,不同的第二片段与固相中的第一片段偶联。 然后,然后使用溶液相化学法将另外的氨基酸材料添加到不同的第三片段。 随后,将该不同的第三片段与溶液相中的偶联的第一和不同的第二片段偶联。 在其中一个片段中使用假脯氨酸使得该片段的固相合成减轻了该片段随后与其它片段的溶液相偶联。 本发明对于形成促胰岛素肽如GLP-1(7-36)及其天然和非天然对应物非常有用。

    SYSTEM AND METHOD OF MAPPING SHADER VARIABLES INTO PHYSICAL REGISTERS
    95.
    发明申请
    SYSTEM AND METHOD OF MAPPING SHADER VARIABLES INTO PHYSICAL REGISTERS 有权
    将SHADER变量映射到物理寄存器的系统和方法

    公开(公告)号:US20090085919A1

    公开(公告)日:2009-04-02

    申请号:US11864484

    申请日:2007-09-28

    IPC分类号: G06F13/14 G09G5/36

    CPC分类号: G06T15/005 G06F8/441

    摘要: The present disclosure includes system and method of mapping shader variables into physical registers. In an embodiment, a graphics processing unit (GPU) and a memory coupled to the GPU are disclosed. The memory includes a processor readable data file that has a register file portion. The register file portion has a rectangular structure including a plurality of data items. At least two of the plurality of data items corresponding to data elements of a shader program. The data elements have different data storage types.

    摘要翻译: 本公开包括将着色器变量映射到物理寄存器的系统和方法。 在一个实施例中,公开了一种图形处理单元(GPU)和耦合到GPU的存储器。 存储器包括具有寄存器文件部分的处理器可读数据文件。 寄存器文件部分具有包括多个数据项的矩形结构。 与着色器程序的数据元素对应的多个数据项中的至少两个。 数据元素具有不同的数据存储类型。

    Asymmetrical IO method and system
    96.
    发明授权
    Asymmetrical IO method and system 有权
    非对称IO方法和系统

    公开(公告)号:US07487378B2

    公开(公告)日:2009-02-03

    申请号:US11231078

    申请日:2005-09-19

    IPC分类号: G06F1/04 G06F1/24 G06F11/00

    摘要: An asymmetrical IO method and system are described. In one embodiment, a host device includes shared resources for data synchronization of the host device and a client device. The shared resources include a shared phase interpolator. In an embodiment, data lines between the host and client are also used to transmit phase information from the client device to the host device, obviating the need for additional, dedicated lines or pins.

    摘要翻译: 描述了非对称IO方法和系统。 在一个实施例中,主机设备包括用于主机设备和客户端设备的数据同步的共享资源。 共享资源包括一个共享相位内插器。 在一个实施例中,主机和客户机之间的数据线也用于将相位信息从客户端设备发送到主机设备,从而避免了对额外的专用线或引脚的需要。

    APPARATUS FOR USE IN MOUNTING A MOVABLE DOOR LEAF ON AN OVERHEAD TRACK
    97.
    发明申请
    APPARATUS FOR USE IN MOUNTING A MOVABLE DOOR LEAF ON AN OVERHEAD TRACK 审中-公开
    用于安装可移动门窗的装置

    公开(公告)号:US20080196206A1

    公开(公告)日:2008-08-21

    申请号:US11770819

    申请日:2007-06-29

    申请人: Lin Chen Daniel Yang

    发明人: Lin Chen Daniel Yang

    IPC分类号: E05D15/06

    摘要: Apparatus for use in mounting a movable door leaf on an overhead track includes a door leaf mounted assembly having a hanging member and a mounting bracket, and a carriage assembly having a support bracket and a moving mechanism. The support bracket has a side opening forming a channel for the hanging member to pass through and a slot extending downwardly therefrom the channel in relatively smaller depth and width comparatively to the channel. The channel includes a first portion connected to the slot and, and a second portion partially connected to the slot with larger depth comparatively to the first portion. A shoulder is formed between the first and second portions. The hanging member passes through the channel to rest against at an end adjacent to the second portion, and the top part of the hanging member vertically hangs down to rest against the shoulder and the support bracket.

    摘要翻译: 用于将可移动门扇安装在架空轨道上的装置包括具有悬挂构件和安装支架的门扇安装组件,以及具有支撑托架和移动机构的托架组件。 支撑托架具有形成用于悬挂构件通过的通道的侧开口和相对于通道以相对更小的深度和宽度从槽向下延伸的槽。 通道包括连接到槽的第一部分和与第一部分相比具有较大深度部分地连接到槽的第二部分。 在第一和第二部分之间形成肩部。 悬挂构件穿过通道以抵靠靠近第二部分的端部,并且垂直悬挂构件的顶部垂直悬挂以抵靠肩部和支撑支架。

    Fast transition from low-speed mode to high-speed mode in high-speed interfaces
    98.
    发明申请
    Fast transition from low-speed mode to high-speed mode in high-speed interfaces 有权
    在高速接口中从低速模式快速转换到高速模式

    公开(公告)号:US20080005455A1

    公开(公告)日:2008-01-03

    申请号:US11804413

    申请日:2007-05-17

    IPC分类号: G06F12/08 G06F1/12

    摘要: Embodiments directed to a memory device and a memory controller that continue to operate in a low-power mode during the period required for analog timing circuitry to initialize and become usable, are described. During a low-speed to high-speed transition mode of operation for a high-speed interface, timing circuitry of the interface between the memory device and memory controller locks to a forward clock signal concurrent with the continued operation of the interface in low-speed mode. A reference clock signal configured to operate at a rate that provides both a high-speed mode and a low-speed mode and which is used as a single rate clock allows phase detection and correction circuitry to be disabled, thus allowing the idle period caused by a transition from low-speed mode to high-speed mode to be significantly reduced.

    摘要翻译: 描述了在模拟定时电路初始化和变得可用的时间段期间继续在低功率模式下工作的存储器件和存储器控制器的实施例。 在用于高速接口的低速到高速转换操作模式期间,存储器件和存储器控制器之间的接口的定时电路锁定到正向时钟信号,并且与低速接口的继续操作同时进行 模式。 参考时钟信号被配置为以提供高速模式和低速模式并且被用作单个速率时钟的速率操作,允许相位检测和校正电路被禁用,从而允许由 从低速模式向高速模式的转变将大大降低。

    Write data mask method and system
    100.
    发明申请
    Write data mask method and system 有权
    写数据掩码的方法和系统

    公开(公告)号:US20070101073A1

    公开(公告)日:2007-05-03

    申请号:US11359809

    申请日:2006-02-22

    IPC分类号: G06F13/00

    摘要: A method and system for performing byte-writes are described, where byte-writes involve writing only particular bytes of a multiple byte write operation. Embodiments include mask data that indicates which bytes are to be written in a byte-write operation. No dedicated mask pin(s) or dedicated mask line(s) are used. In one embodiment, the mask data is transmitted on data lines and store in response to a write_mask command. In one embodiment, the mask data is transmitted as part of the write command.

    摘要翻译: 描述了用于执行字节写入的方法和系统,其中字节写入仅涉及仅写入多字节写入操作的特定字节。 实施例包括指示在字节写入操作中要写入哪些字节的掩码数据。 不使用专用的掩码引脚或专用掩码线。 在一个实施例中,掩码数据在数据线上传输,并响应于write_mask命令存储。 在一个实施例中,掩模数据作为写入命令的一部分被发送。