公开(公告)号：US20120259804A1

公开(公告)日：2012-10-11

申请号：US13083414

申请日：2011-04-08

Applicant: Bernard V. Brezzo ,  Leland Chang ,  Steven K. Esser ,  Daniel J. Friedman ,  Yong Liu ,  Dharmendra S. Modha ,  Robert K. Montoye ,  Bipin Rajendran ,  Jae-sun Seo ,  Jose A. Tierno

Inventor： Bernard V. Brezzo ,  Leland Chang ,  Steven K. Esser ,  Daniel J. Friedman ,  Yong Liu ,  Dharmendra S. Modha ,  Robert K. Montoye ,  Bipin Rajendran ,  Jae-sun Seo ,  Jose A. Tierno

IPC: G06N3/04 ,  G06N3/08

CPC classification number: G06N3/063 ,  G06N3/04 ,  G06N3/049 ,  G06N3/082

Abstract: A reconfigurable neural network circuit is provided. The reconfigurable neural network circuit comprises an electronic synapse array including multiple synapses interconnecting a plurality of digital electronic neurons. Each neuron comprises an integrator that integrates input spikes and generates a signal when the integrated inputs exceed a threshold. The circuit further comprises a control module for reconfiguring the synapse array. The control module comprises a global final state machine that controls timing for operation of the circuit, and a priority encoder that allows spiking neurons to sequentially access the synapse array.

公开(公告)号：US20120173471A1

公开(公告)日：2012-07-05

申请号：US12982546

申请日：2010-12-30

Applicant: Rajagopal Ananthanarayanan ,  Steven K. Esser ,  Dharmendra S. Modha

Inventor： Rajagopal Ananthanarayanan ,  Steven K. Esser ,  Dharmendra S. Modha

IPC: G06N3/063 ,  G06N3/08

CPC classification number: G06N3/049

Abstract: Neuronal networks of electronic neurons interconnected via electronic synapses with synaptic weight normalization. The synaptic weights are based on learning rules for the neuronal network, such that a synaptic weight for a synapse determines the effect of a spiking source neuron on a target neuron connected via the synapse. Each synaptic weight is maintained within a predetermined range by performing synaptic weight normalization for neural network stability.

Abstract translation: 通过电子突触与突触体重标准化相互联系的神经元网络。 突触权重基于神经元网络的学习规则，使得突触的突触权重决定了刺激源神经元对通过突触连接的目标神经元的影响。 通过对神经网络稳定性执行突触权重归一化，将每个突触重量保持在预定范围内。

公开(公告)号：US20120150781A1

公开(公告)日：2012-06-14

申请号：US12963558

申请日：2010-12-08

Applicant: John V. Arthur ,  Gregory S. Corrado ,  Steven K. Esser ,  Paul A. Merolla ,  Dharmendra S. Modha

Inventor： John V. Arthur ,  Gregory S. Corrado ,  Steven K. Esser ,  Paul A. Merolla ,  Dharmendra S. Modha

IPC: G06N3/02 ,  G06N3/00

CPC classification number: G06N3/049

Abstract: An integrate and fire electronic neuron is disclosed. Upon receiving an external spike signal, a digital membrane potential of the electronic neuron is updated based on the external spike signal. The electric potential of the membrane is decayed based on a leak rate. Upon the electric potential of the membrane exceeding a threshold, a spike signal is generated.

Abstract translation: 公开了一种整合和消防电子神经元。 在接收到外部尖峰信号时，基于外部尖峰信号更新电子神经元的数字膜电位。 膜的电位根据泄漏率衰减。 当膜的电位超过阈值时，产生尖峰信号。

公开(公告)号：US20120109864A1

公开(公告)日：2012-05-03

申请号：US12916332

申请日：2010-10-29

Applicant: Dharmendra S. Modha

Inventor： Dharmendra S. Modha

IPC: G06N3/08

CPC classification number: G06N3/08 ,  G06N3/04 ,  G06N3/049 ,  G06N3/063

Abstract: Embodiments of the invention provide neuromorphic-synaptronic systems, including neuromorphic-synaptronic circuits implementing spiking neural network with synaptic weights learned using simulation. One embodiment includes simulating a spiking neural network to generate synaptic weights learned via the simulation while maintaining one-to-one correspondence between the simulation and a digital circuit chip. The learned synaptic weights are loaded into the digital circuit chip implementing a spiking neural network, the digital circuit chip comprising a neuromorphic-synaptronic spiking neural network including plural synapse devices interconnecting multiple digital neurons.

Abstract translation: 本发明的实施方案提供神经形态 - synaptronic系统，其包括使用模拟学习的具有突触重量的尖峰神经网络的神经形态 - synaptronic电路。 一个实施例包括模拟加标神经网络以产生通过模拟学习的突触权重，同时保持模拟和数字电路芯片之间的一对一对应关系。 所学的突触权重被加载到实现尖峰神经网络的数字电路芯片中，该数字电路芯片包括一个包含多个连接多个数字神经元的突触装置的神经 - 突触间期刺激神经网络。

公开(公告)号：US20110182349A1

公开(公告)日：2011-07-28

申请号：US12695119

申请日：2010-01-27

Applicant: Rajagopal Ananthanarayanan ,  Shyamal S. Chandra ,  Dharmendra S. Modha ,  Raghavendra Singh

Inventor： Rajagopal Ananthanarayanan ,  Shyamal S. Chandra ,  Dharmendra S. Modha ,  Raghavendra Singh

IPC: H04N11/04 ,  G06T15/00

CPC classification number: G11B27/10 ,  G06N3/049 ,  G06T11/206 ,  G11B27/34

Abstract: Adaptive and integrated visualization of spatiotemporal data from large-scale simulation, is provided. A simulation is performed utilizing a simulator comprising multiple processors, generating spatiotemporal data samples from the simulation. Each data sample has spatial coordinates with a time stamp at a specific time resolution, and a tag. The data samples are assembled into data streams based on at least one of a spatial relationship and the corresponding tag. Each data stream is encoded into multiple formats, and an integrated and adaptive visualization of the data streams is displayed, wherein various data streams are simultaneously and synchronously displayed.

Abstract translation: 提供了大规模模拟的时空数据的自适应和综合可视化。 使用包括多个处理器的模拟器执行模拟，从仿真生成时空数据样本。 每个数据样本具有具有特定时间分辨率的时间戳的空间坐标和标签。 基于空间关系和相应标签中的至少一个将数据样本组装成数据流。 每个数据流被编码成多种格式，并且显示数据流的集成和自适应可视化，其中同时和同步地显示各种数据流。

公开(公告)号：US07395377B2

公开(公告)日：2008-07-01

申请号：US11407797

申请日：2006-04-20

Applicant: Binny S. Gill ,  Dharmendra S. Modha

Inventor： Binny S. Gill ,  Dharmendra S. Modha

IPC: G06F12/00

CPC classification number: G06F12/0804 ,  G06F12/0866 ,  G06F2212/222

Abstract: A technique for determining when to destage write data from a fast, NVS of a computer system from an upper level to a lower level of storage in the computer system comprises adaptively varying a destage rate of the NVS according to a current storage occupancy of the NVS; maintaining a high threshold level for the NVS; maintaining a low threshold level that is set to be a predetermined fixed amount below the high threshold; setting the destage rate of the NVS to zero when the NVS occupancy is below the low threshold; setting the destage rate of the NVS to be maximum when the NVS occupancy is above the high threshold; linearly increasing the destage rate of the NVS from zero to maximum as the NVS occupancy goes from the low to the high threshold; and adaptively varying the high threshold in response to a dynamic computer storage workload.

Abstract translation: 一种用于确定何时从计算机系统的快速NVS将计算机系统的写入数据从计算机系统中的较高级别存储到较低级别的存储装置的技术包括根据NVS的当前存储占用自适应地改变NVS的流率 ; 维持NVS的高门槛值; 保持低阈值水平，其被设置为低于高阈值的预定固定量; 当NVS占用率低于低阈值时，将NVS的流出率设置为零; 当NVS占用率高于高阈值时，将NVS的流出率设置为最大值; 随着NVS占用率从低到高的阈值，将NVS的流失率从零线性上升到最大值; 以及响应于动态计算机存储工作负载自适应地改变高阈值。