公开(公告)号：US07371693B2

公开(公告)日：2008-05-13

申请号：US10784888

申请日：2004-02-24

申请人： Akira Suzuki ,  Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao ,  Shinzo Ishibe ,  Shigeki Otsuka ,  Keiichi Yamaguchi

发明人： Akira Suzuki ,  Takashi Noma ,  Hiroyuki Shinogi ,  Yukihiro Takao ,  Shinzo Ishibe ,  Shigeki Otsuka ,  Keiichi Yamaguchi

IPC分类号： H01L21/461

CPC分类号： H01L21/78 ,  H01L23/3114 ,  H01L23/482 ,  H01L23/49827 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2224/05599 ,  H01L2224/05099

摘要： Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.

摘要翻译： CSP型半导体器件降低成本并提高可靠性。 作为支撑板的玻璃基板通过粘合剂粘合到其上形成有第一布线的半导体晶片的第一表面。 半导体晶片的厚度通过在与半导体晶片的第一表面相对的半导体晶片的第二表面上的背面研磨半导体晶片来减少。 湿式蚀刻半导体晶片以去除在后研磨期间引起的半导体晶片的第二表面上的凸起和凹陷。 然后蚀刻半导体晶片的第二表面以形成锥形槽。 湿式蚀刻半导体晶片以减少由蚀刻引起的凸起和凹陷，并且绕着凹槽的一角。 湿蚀刻提高了绝缘膜，布线和保护膜的覆盖率，并提高了半导体器件的产量和可靠性。

公开(公告)号：US07312521B2

公开(公告)日：2007-12-25

申请号：US10420943

申请日：2003-04-23

申请人： Takashi Noma ,  Hiroyuki Shinogi ,  Nobuyuki Takai ,  Katsuhiko Kitagawa ,  Ryoji Tokushige ,  Takayasu Otagaki ,  Tatsuya Ando ,  Mitsuru Okigawa

发明人： Takashi Noma ,  Hiroyuki Shinogi ,  Nobuyuki Takai ,  Katsuhiko Kitagawa ,  Ryoji Tokushige ,  Takayasu Otagaki ,  Tatsuya Ando ,  Mitsuru Okigawa

IPC分类号： H01L23/48 ,  H01L23/12 ,  H01L29/70 ,  H01L31/02 ,  H01L23/04

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00

摘要： Cost is reduced and reliability is improved with a BGA (Ball Grid Array) type semiconductor device which has ball-shaped conductive terminals. A first wiring is formed on an insulation film which is formed on a surface of a semiconductor die. A glass substrate is bonded over the surface of the semiconductor die, and a side surface and a back surface of the semiconductor die are covered with an insulation film. A second wiring is connected to a side surface or a back surface of the first wiring and extending over the back surface of the semiconductor die. A conductive terminal such as a bump is formed on the second wiring.

摘要翻译： 具有球形导电端子的BGA（球栅阵列）型半导体器件降低了成本并提高了可靠性。 第一布线形成在形成在半导体管芯的表面上的绝缘膜上。 在半导体管芯的表面上接合玻璃基板，半导体管芯的侧表面和背面被绝缘膜覆盖。 第二布线连接到第一布线的侧表面或后表面并在半导体管芯的后表面上延伸。 导电端子如凸块形成在第二布线上。

公开(公告)号：US07304463B2

公开(公告)日：2007-12-04

申请号：US11115754

申请日：2005-04-27

申请人： Takashi Noma

发明人： Takashi Noma

IPC分类号： G05F1/618 ,  G05F1/575

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： A DC-DC converter includes an Nch FET1 which is series connected between an input terminal and an output terminal, and an Nch FET2 which is connected between the output terminal side of the Nch FET1 and a ground terminal. On the output terminal side of the circuits, a smoothing circuit and a comparator circuit are connected. The output side of the comparator circuit is connected to an on-time limiter circuit, and the on-time limiter circuit is connected to an H/S driver circuit for controlling the Nch FET1 through an inverter and directly connected to an L/S driver circuit for controlling the Nch FET2. Here, when a switching control signal for turning on the Nch FET1 is input to the on-time limiter circuit from the comparator, the on-time limiter circuit detects a time in the on state and outputs a signal by which the Nch FET1 is temporarily off controlled.

摘要翻译： DC-DC转换器包括串联连接在输入端子和输出端子之间的Nch FET <1>和连接在输出端子侧之间的Nch FET <2> 的Nch FET 1＆lt; 1＆gt;和接地端子。 在电路的输出端侧连接有平滑电路和比较电路。 比较器电路的输出侧与导通时间限制电路连接，接通时间限制电路通过逆变器连接到H / S驱动电路，以控制Nch FET <1> 直接连接到用于控制Nch FET <2>的L / S驱动电路。 这里，当用于接通Nch FET <1>的开关控制信号从比较器输入到接通时间限制器电路时，接通时间限制器电路检测处于导通状态的时间，并输出 Nch FET 1暂时关闭的信号被控制。

公开(公告)号：US07256073B2

公开(公告)日：2007-08-14

申请号：US11492044

申请日：2006-07-25

申请人： Takashi Noma ,  Akira Suzuki ,  Hiroyuki Shinogi

发明人： Takashi Noma ,  Akira Suzuki ,  Hiroyuki Shinogi

IPC分类号： H01L21/00

CPC分类号： H01L24/02 ,  H01L21/76898 ,  H01L23/3114 ,  H01L25/0657 ,  H01L27/14806 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06565 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/00

摘要： A stacked MCM is manufactured at reduced cost without using expensive apparatus. A first wiring and a second wiring are formed on a surface of a semiconductor chip of a first semiconductor device through an insulation film. A glass substrate having an opening to expose the second wiring is bonded to the surface of the semiconductor chip on which the first wiring and the second wiring are formed. A third wiring is disposed on a back surface and a side surface of the semiconductor chip through an insulation film and connected to the first wiring. And a conductive terminal of another semiconductor device is connected to the second wiring through the opening.

摘要翻译： 在不使用昂贵的设备的情况下，以低成本制造堆叠MCM。 通过绝缘膜在第一半导体器件的半导体芯片的表面上形成第一布线和第二布线。 具有露出第二布线的开口的玻璃基板被接合到形成有第一布线和第二布线的半导体芯片的表面上。 第三布线通过绝缘膜设置在半导体芯片的背面和侧面上并连接到第一布线。 并且另一半导体器件的导电端子通过开口连接到第二布线。

公开(公告)号：US20070145590A1

公开(公告)日：2007-06-28

申请号：US11639411

申请日：2006-12-15

申请人： Takashi Noma ,  Kazuo Okada ,  Shinzo Ishibe ,  Katsuhiko Kitagawa ,  Yuichi Morita ,  Shigeki Otsuka ,  Hiroshi Yamada ,  Noboru Okubo ,  Hiroyuki Shinogi ,  Mitsuru Okigawa

发明人： Takashi Noma ,  Kazuo Okada ,  Shinzo Ishibe ,  Katsuhiko Kitagawa ,  Yuichi Morita ,  Shigeki Otsuka ,  Hiroshi Yamada ,  Noboru Okubo ,  Hiroyuki Shinogi ,  Mitsuru Okigawa

IPC分类号： H01L23/52

CPC分类号： H01L27/14618 ,  H01L27/14636 ,  H01L31/0203 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/10 ,  H01L2924/00014

摘要： This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.

摘要翻译： 本发明提供一种半导体器件，其解决了形成在半导体衬底的背面上的布线的图案在输出图像上反射的问题。 在半导体衬底的前表面上形成有光接收元件（例如CCD，红外线传感器，CMOS传感器或照明传感器），并且多个球形导电端子设置在 半导体衬底。 每个导电端子通过布线层电连接到半导体衬底的前表面上的焊盘电极。 布线层和导电端子形成在除了在垂直方向上与光接收元件重叠的区域之外的半导体基板的背面上，并且不布置在与光接收元件重叠的区域中。

公开(公告)号：US20050285585A1

公开(公告)日：2005-12-29

申请号：US11115754

申请日：2005-04-27

申请人： Takashi Noma

发明人： Takashi Noma

IPC分类号： G05F1/40 ,  H02M3/158

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： A DC-DC converter includes an Nch FET1 which is series connected between an input terminal and an output terminal, and an Nch FET2 which is connected between the output terminal side of the Nch FET1 and a ground terminal. On the output terminal side of the circuits, a smoothing circuit and a comparator circuit are connected. The output side of the comparator circuit is connected to an on-time limiter circuit, and the on-time limiter circuit is connected to an H/S driver circuit for controlling the Nch FET1 through an inverter and directly connected to an L/S driver circuit for controlling the Nch FET2. Here, when a switching control signal for turning on the Nch FET1 is input to the on-time limiter circuit from the comparator, the on-time limiter circuit detects a time in the on state and outputs a signal by which the Nch FET1 is temporarily off controlled.

摘要翻译： DC-DC转换器包括串联连接在输入端子和输出端子之间的Nch FET <1>和连接在输出端子侧之间的Nch FET <2> 的Nch FET 1＆lt; 1＆gt;和接地端子。 在电路的输出端侧连接有平滑电路和比较电路。 比较器电路的输出侧与导通时间限制电路连接，接通时间限制电路通过逆变器连接到H / S驱动电路，以控制Nch FET <1> 直接连接到用于控制Nch FET <2>的L / S驱动电路。 这里，当用于接通Nch FET <1>的开关控制信号从比较器输入到接通时间限制器电路时，接通时间限制器电路检测处于导通状态的时间，并输出 Nch FET 1暂时关闭的信号被控制。

公开(公告)号：US06654221B2

公开(公告)日：2003-11-25

申请号：US09923987

申请日：2001-08-07

申请人： Takashi Noma ,  Yasuyuki Morishima

发明人： Takashi Noma ,  Yasuyuki Morishima

IPC分类号： H02H904

CPC分类号： H05B41/2855

摘要： Current flowing through a cold cathode tube is detected and converted to a voltage with a resistor, and is fed to a tube current control circuit. The tube current control circuit drives a drive circuit to control a voltage applied to a piezoelectric transformer. Current from a constant-current source is used to charge a fault protection capacitor. A transistor is allowed to conduct while current flows through the cold cathode tube so that a voltage is developed in a resistor, and thereby, an electric charge is prevented from being stored in the fault protection capacitor, thereby stopping the operation of a fault protection circuit.

摘要翻译： 检测流过冷阴极管的电流并将其转换成具有电阻的电压，并将其馈送到管电流控制电路。 管电流控制电路驱动驱动电路来控制施加到压电变压器的电压。 来自恒流源的电流用于对故障保护电容器充电。 允许晶体管导通，同时电流流过冷阴极管，使得在电阻器中产生电压，从而防止电荷存储在故障保护电容器中，从而停止故障保护电路的操作 。

公开(公告)号：US06229720B1

公开(公告)日：2001-05-08

申请号：US09535892

申请日：2000-03-27

申请人： Takashi Noma ,  Yasuyuki Morishima

发明人： Takashi Noma ,  Yasuyuki Morishima

IPC分类号： H02M112

CPC分类号： H05B41/2822 ,  H02M7/537 ,  H02M2001/007 ,  H05B41/3925

摘要： A piezoelectric transformer inverter can suppress ripples generated by the oscillations of a transformer, and can reduce the possibility of occurrence of beats in the inverter. In this piezoelectric transformer inverter, a switching element is disposed at a stage before an inverter circuit driving a discharge tube, and the switching element is switched on and off by switching signals from a chopper-duty control unit. Then, an input voltage is converted into a rectangular-wave voltage having a chopper circuit frequency to be supplied to the inverter circuit, and a frequency of n times a driving frequency of the inverter circuit and a chopper frequency of the chopper circuit are set in such a manner that these two frequencies are not close to each other.

摘要翻译： 压电变压器逆变器可以抑制由变压器的振荡产生的波纹，并且可以减少逆变器中发生节拍的可能性。 在该压电变压器逆变器中，开关元件设置在逆变器电路驱动放电管之前的阶段，并且通过切换来自斩波器占空比控制单元的信号来接通和断开开关元件。 然后，将输入电压转换为具有斩波电路频率的矩形波电压供给到逆变器电路，将逆变器电路的驱动频率的n倍的频率和斩波电路的斩波频率设定在 这样的方式使得这两个频率彼此不接近。

公开(公告)号：US6144139A

公开(公告)日：2000-11-07

申请号：US409807

申请日：1999-09-30

申请人： Takashi Noma ,  Yasuyuki Morishima ,  Hidehiko Sugimoto

发明人： Takashi Noma ,  Yasuyuki Morishima ,  Hidehiko Sugimoto

IPC分类号： H02M3/24 ,  H02M7/48 ,  H05B41/24 ,  H05B41/282 ,  H05B41/392 ,  H01L41/08

CPC分类号： H05B41/2822 ,  H05B41/2827 ,  H05B41/2828 ,  H05B41/3925

摘要： A piezoelectric transformer inverter includes: a piezoelectric transformer, one of whose primary electrodes is grounded, which performs voltage conversion of alternating voltage or direct current voltage applied between the primary electrodes and supplies the converted voltage to a load connected to a secondary electrode; a drive unit for supplying alternating voltage or direct current voltage between the primary electrodes of the piezoelectric transformer; a low-pass type resonance circuit unit inserted between the output of the drive unit and the primary electrodes of the piezoelectric transformer; a duty control unit for controlling ON-Duty of the drive unit so that a value of current flowing into the load coincides with a targeted current value; a phase-difference detection unit for detecting a phase difference between the input voltage and the output voltage of the piezoelectric transformer; and a frequency control unit for controlling a driving frequency of the drive unit.

摘要翻译： 一种压电变压器逆变器包括：压电变压器，其一个主电极接地，其施加在主电极之间的交流电压或直流电压的电压转换，并将转换的电压提供给连接到次级电极的负载; 用于在压电变压器的主电极之间提供交流电压或直流电压的驱动单元; 插入在驱动单元的输出端和压电变压器的主电极之间的低通型谐振电路单元; 负责控制单元，用于控制驱动单元的占空比，使得流入负载的电流值与目标电流值一致; 相位差检测单元，用于检测压电变压器的输入电压和输出电压之间的相位差; 以及用于控制驱动单元的驱动频率的频率控制单元。

公开(公告)号：US6055029A

公开(公告)日：2000-04-25

申请号：US898271

申请日：1997-07-22

申请人： Mikio Kurihara ,  Fumihisa Hanzawa ,  Yoji Oki ,  Kazushige Ohta ,  Takashi Noma ,  Hidiaki Sasaya ,  Tatsuo Fukui

发明人： Mikio Kurihara ,  Fumihisa Hanzawa ,  Yoji Oki ,  Kazushige Ohta ,  Takashi Noma ,  Hidiaki Sasaya ,  Tatsuo Fukui

IPC分类号： G02B6/00 ,  F21V8/00 ,  G02F1/13 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/13357

CPC分类号： G02B6/0093 ,  G02B6/0088 ,  G02F1/133615 ,  G02B6/0051 ,  G02F1/133308 ,  G02F2201/503 ,  G02F2201/54

摘要： Since a backlighting apparatus 1 for liquid crystal display is constituted such that a light guiding plate 2 and a frame 3 are molded together as a single unit provided with a deformation relaxation design, an attaching unit and parts, such as attaching feet and screws, for attaching the light guiding plate 2 to the frame 3 are not required, thereby making it possible to reduce the thickness and size of the backlighting apparatus 1 for liquid crystal display which has been restricted by the sizes of these parts.

摘要翻译： 由于用于液晶显示器的背光装置1被构造成使得导光板2和框架3一起模制成具有变形松弛设计的单个单元，附接单元和诸如安装脚和螺钉的部件，用于 不需要将导光板2安装到框架3，从而可以减小受这些部件的尺寸限制的液晶显示器的背光装置1的厚度和尺寸。