公开(公告)号：US20120294103A1

公开(公告)日：2012-11-22

申请号：US13569442

申请日：2012-08-08

申请人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

发明人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

IPC分类号： G11C7/12

CPC分类号： G11C16/3418 ,  G11C16/0416 ,  G11C16/24 ,  G11C16/3427

摘要： A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

摘要翻译： 提供了一种能够在与诸如程序，读取和/或擦除之类的存储器相关联的AC操作期间最小化干扰的系统和方法。 在AC操作期间，系统将存储器阵列中的所有或所需的位线子集预充电到指定的电压，以便于减少相邻单元之间的AC干扰。 可以将预充电电压施加到存储器阵列中的块中的所有位线，或者对与所选择的存储器单元相关联的位线以及与块中所选择的存储单元相邻的相邻存储单元。 该系统确保在选择存储器单元时，源极和漏极电压电平可以在相同或基本相同的时间被设置为期望的电平。 这可以有助于在AC操作期间最小化所选择的存储器单元中的AC干扰。

公开(公告)号：US08055226B2

公开(公告)日：2011-11-08

申请号：US11583200

申请日：2006-10-18

申请人： Yi He ,  Marcus K. Da Silva

发明人： Yi He ,  Marcus K. Da Silva

IPC分类号： H04B11/00

CPC分类号： H04B1/28 ,  G01R29/08 ,  H04B17/21

摘要： A method of correcting the frequency response of an RF receiver having a frequency translation device and a fixed IF frequency section uses calibration data representing frequency responses over a wide frequency range for multiple center frequencies. The calibration data are based upon a multi-dimensional model for the frequency translation device that includes at least center frequency and offset frequency. The calibration data are stored in the RF receiver during factory calibration. A run-time normalization of the RF receiver produces a normalization frequency response at a reference frequency, and a relative frequency response at a desired center frequency is derived from the calibration data. The normalized and relative frequency responses are combined to produce an overall frequency response that is used by the RF receiver to configure an inverse filter to correct channel linear distortion produced by the frequency response of the frequency translation device at the desired center frequency.

摘要翻译： 校正具有频率转换装置和固定IF频率部分的RF接收机的频率响应的方法使用表示针对多个中心频率的宽频率范围的频率响应的校准数据。 校准数据基于用于频率转换装置的多维模型，其包括至少中心频率和偏移频率。 校准数据在工厂校准期间存储在RF接收机中。 RF接收机的运行时间归一化在参考频率处产生归一化频率响应，并且从校准数据导出期望中心频率处的相对频率响应。 归一化和相对频率响应被组合以产生由RF接收机使用的整体频率响应，以配置反向滤波器以校正由期望中心频率处的频率转换装置的频率响应产生的信道线性失真。

公开(公告)号：US20110217018A1

公开(公告)日：2011-09-08

申请号：US12715914

申请日：2010-03-02

申请人： Yi He ,  Luzhong Yin ,  Guixiong Zhong ,  Jun Yan ,  Jing Zhao

发明人： Yi He ,  Luzhong Yin ,  Guixiong Zhong ,  Jun Yan ,  Jing Zhao

IPC分类号： G02B6/00 ,  B23P11/00

CPC分类号： B23P11/00 ,  G02B6/00

摘要： A MEMS variable optical attenuator (VOA) chip includes a frame having a planar surface, a micro-electric actuator with a movable optical shutter arranged with respect to the planar surface of the frame, where the VOA is actuated by thermal expansion. The micro-electric actuator comprises semiconductor conductors (“wires”) that can be moved, upon applying an electrical current, by thermal expansion. In one embodiment, the MEMS VOA chip is configured in a multiple wire arrangement that restricts the shutter movement in a plane.

摘要翻译： MEMS可变光衰减器（VOA）芯片包括具有平面表面的框架，具有相对于框架的平面表面布置的可移动光学快门的微电致动器，其中通过热膨胀致动VOA。 微电动致动器包括可通过热膨胀在施加电流时移动的半导体导体（“导线”）。 在一个实施例中，MEMS VOA芯片被配置为限制在平面中的快门运动的多线布置。

公开(公告)号：US07749973B2

公开(公告)日：2010-07-06

申请号：US10477375

申请日：2002-05-31

申请人： Chamsy Sarkis ,  Yi He ,  Che Serguera ,  Noelle Dufour ,  Jacques Mallet

发明人： Chamsy Sarkis ,  Yi He ,  Che Serguera ,  Noelle Dufour ,  Jacques Mallet

IPC分类号： A01N43/04 ,  A01N65/00 ,  A61K31/70 ,  A61K48/00 ,  C12N15/00

CPC分类号： C12N7/00 ,  A61K48/00 ,  C07K14/005 ,  C12N15/86 ,  C12N2740/16043 ,  C12N2740/16045 ,  C12N2740/16062 ,  C12N2760/20122

摘要： The invention relates to a defective lentivirus which is pseudotyped with a lyssavirus envelope of the PV (rabies virus) or MOK type (Mokola virus), for example, and to the use thereof, especially in the preparation of a composition for in vivo transfer of genes in astrocytes and also for the treatment of disorders of the central nervous system.

摘要翻译： 本发明涉及一种用PV（狂犬病病毒）或MOK型（莫考拉病毒）的淋巴病毒包膜进行伪型化的有缺陷的慢病毒及其用途，特别是在制备用于体内转移 星形胶质细胞中的基因，也用于治疗中枢神经系统疾病。

公开(公告)号：US07742320B2

公开(公告)日：2010-06-22

申请号：US11745089

申请日：2007-05-07

申请人： Jing Hu ,  Kok Kee Lim ,  Meng Kiat Jeoh ,  Xiao Wu Gong ,  Yi He

发明人： Jing Hu ,  Kok Kee Lim ,  Meng Kiat Jeoh ,  Xiao Wu Gong ,  Yi He

IPC分类号： H02M3/335 ,  G05F1/40

CPC分类号： H02M3/33507

摘要： An integrated circuit includes an operational amplifier configured to receive a current sense voltage (VCS) at a first input and an offset voltage at a second input. A comparator is coupled to the operational amplifier and adapted to receive at a first input an output voltage signal (VOUT) of the operational amplifier. A voltage limiting circuit is configured to receive a regulation voltage. A fold back correction circuit is coupled to the voltage limiting circuit and to a second input of the comparator. A pulse width modulator circuit is coupled to the comparator and is adapted to receive the output of comparator.

摘要翻译： 集成电路包括被配置为在第一输入处接收电流检测电压（VCS）的运算放大器和在第二输入处的偏移电压。 比较器耦合到运算放大器并且适于在第一输入处接收运算放大器的输出电压信号（VOUT）。 电压限制电路被配置为接收调节电压。 折返校正电路耦合到电压限制电路和比较器的第二输入端。 脉冲宽度调制器电路耦合到比较器，并且适于接收比较器的输出。

公开(公告)号：US20100128521A1

公开(公告)日：2010-05-27

申请号：US12275663

申请日：2008-11-21

申请人： Yuji Mizuguchi ,  Mark W. Randolph ,  Darlene Gay Hamilton ,  Yi He ,  Zhizheng Liu ,  Yanxia (Emma) Lin ,  Xianmin Yi ,  Gulzar Kathawala ,  Amol Ramesh Joshi ,  Kuo-Tung Chang ,  Edward Franklin Runnion ,  Sung-Chul Lee ,  Sung-Yong Chung ,  Yanxiang Liu ,  Yu Sun

发明人： Yuji Mizuguchi ,  Mark W. Randolph ,  Darlene Gay Hamilton ,  Yi He ,  Zhizheng Liu ,  Yanxia (Emma) Lin ,  Xianmin Yi ,  Gulzar Kathawala ,  Amol Ramesh Joshi ,  Kuo-Tung Chang ,  Edward Franklin Runnion ,  Sung-Chul Lee ,  Sung-Yong Chung ,  Yanxiang Liu ,  Yu Sun

IPC分类号： G11C16/04

CPC分类号： G11C16/26 ,  G11C16/08 ,  G11C16/3427

摘要： Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.

摘要翻译： 提出了有助于将预定义的负栅极电压施加到与在读取或验证操作期间选择的存储器单元相关联的所选字线相邻的字线的系统，方法和设备，以便于减少相邻字线干扰。 存储器组件可以包括优化的操作部件，其可以至少部分地基于预定义的操作标准，将预定义的负栅极电压施加到与被选择用于读取或验证操作所选择的存储器单元相关联的所选字线相邻的字线上，以便减少 所选择的存储单元中的相邻字线干扰，以便减少电压阈值的移位并保持期望的操作窗口。 优化的操作组件可选地可以包括评估器组件，其可以便于确定施加到相邻字线的负栅极电压是否被调整以便于将相邻字线干扰降低到低于预定阈值量。

公开(公告)号：US07679967B2

公开(公告)日：2010-03-16

申请号：US11963508

申请日：2007-12-21

申请人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

发明人： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

IPC分类号： G11C16/06

CPC分类号： G11C16/3418 ,  G11C16/0416 ,  G11C16/24 ,  G11C16/3427

摘要： A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

摘要翻译： 提供了一种能够在与诸如程序，读取和/或擦除之类的存储器相关联的AC操作期间最小化干扰的系统和方法。 在AC操作期间，系统将存储器阵列中的所有或所需的位线子集预充电到指定的电压，以便于减少相邻单元之间的AC干扰。 可以将预充电电压施加到存储器阵列中的块中的所有位线，或者对与所选择的存储器单元相关联的位线以及与块中所选择的存储单元相邻的相邻存储单元。 该系统确保在选择存储器单元时，源极和漏极电压电平可以在相同或基本相同的时间被设置为期望的电平。 这可以有助于在AC操作期间最小化所选择的存储器单元中的AC干扰。

公开(公告)号：US07558037B1

公开(公告)日：2009-07-07

申请号：US12112885

申请日：2008-04-30

申请人： Xiaowu Gong ,  Yi He ,  Tuck Meng Chan

发明人： Xiaowu Gong ,  Yi He ,  Tuck Meng Chan

IPC分类号： H02H3/08 ,  H02H9/02 ,  H02H3/20 ,  H02H9/04 ,  H02H7/00 ,  H02H9/00 ,  H02H3/00 ,  H02H3/22

CPC分类号： H02M3/3376 ,  H02M1/32

摘要： Circuit and method for providing over-current and overloading protection with a single additional pin. A converter controller circuit is provided that includes a voltage controlled oscillator and outputs upper and lower gating signals for driving the upper and lower driving transistors in a voltage converter, for example, in an inductor-inductor capacitor half-bridge circuit topology. A current sense input pin of the circuit receives a voltage corresponding to the current flowing in the half-bridge circuit. A feedback input pin has an external capacitor coupled to it and receives a voltage from an output voltage sensor at the output terminals. Over-current protection is provided by sensing the voltage at the current sense input pin with no external components needed. Overload protection is provided by utilizing the external feedback capacitor and the feedback input pin during overload conditions. Methods for providing over-current and overload protection are disclosed.

摘要翻译： 用一个额外的引脚提供过电流和过载保护的电路和方法。 提供了一种转换器控制器电路，其包括压控振荡器，并且输出用于驱动电压转换器中的上下驱动晶体管的上下选通信号，例如在电感 - 电感器电容器半桥电路拓扑中。 电路的电流检测输入引脚接收对应于在半桥电路中流动的电流的电压。 反馈输入引脚具有耦合到其的外部电容器，并从输出端子处的输出电压传感器接收电压。 通过检测电流检测输入引脚上的电压，无需外部元件来提供过电流保护。 在过载条件下利用外部反馈电容器和反馈输入引脚提供过载保护。 公开了提供过电流和过载保护的方法。

公开(公告)号：US20080281560A1

公开(公告)日：2008-11-13

申请号：US12092566

申请日：2006-11-03

申请人： Kathryn A. Engholm ,  Craig D. Bryant ,  Yi He

发明人： Kathryn A. Engholm ,  Craig D. Bryant ,  Yi He

IPC分类号： G01N37/00

CPC分类号： G01R13/0272 ,  G01R13/029

摘要： Embodiments of the present invention comprise systems and methods for determining measurement apparatus acquisition parameters and related processing.

摘要翻译： 本发明的实施例包括用于确定测量装置采集参数和相关处理的系统和方法。

公开(公告)号：US20080205557A1

公开(公告)日：2008-08-28

申请号：US12037282

申请日：2008-02-26

申请人： Yi He

发明人： Yi He

IPC分类号： H03D1/00 ,  H03M1/12

CPC分类号： G01R23/16 ,  G01R15/005

摘要： A system is provided for performing external correction to reduce, or eliminate, the frequency dependent response related to an external device for receiving analog signals. The system includes an ADC and a spectrum processor for converting time-domain digital data into a spectrum. An external correction is provided between the ADC and the spectrum processor to reduce, or eliminate, the frequency dependent response associated with the external device. A corresponding method is provided that determines the frequency response of the external device, determines the gain at the center frequency, determines the normalized frequency response, constructs and inverse filter and applies the inverse filter to the digitized time-domain data and scales the results prior to any conversion, or transformation, into the frequency domain.

摘要翻译： 提供一种用于执行外部校正以减少或消除与用于接收模拟信号的外部设备相关的频率相关响应的系统。 该系统包括ADC和用于将时域数字数据转换为频谱的频谱处理器。 在ADC和频谱处理器之间提供外部校正，以减少或消除与外部设备相关的频率相关响应。 提供了一种确定外部设备的频率响应的方法，确定中心频率的增益，确定归一化的频率响应，构造和逆滤波，并将逆滤波器应用于数字化的时域数据，并对之前的结果进行比例 以任何转换或转换为频域。