Semiconductor Device And Manufacturing Method Thereof
    91.
    发明申请
    Semiconductor Device And Manufacturing Method Thereof 有权
    半导体器件及其制造方法

    公开(公告)号:US20080079077A1

    公开(公告)日:2008-04-03

    申请号:US11570037

    申请日:2005-05-25

    IPC分类号: H01L27/12 H01L21/84

    摘要: A semiconductor device having SRAM cell units each comprising a pair of a first driving transistor and a second driving transistor, a pair of a first load transistor and a second load transistor, and a pair of a first access transistor and a second access transistor, wherein each of the transistors comprises a semiconductor layer projecting upward from a substrate plane, a gate electrode extending on opposite sides of the semiconductor layer so as to stride over a top of the semiconductor layer, a gate insulating film interposed between the gate electrode and the semiconductor layer, and a pair of source/drain areas formed in the semiconductor layer; and the first and second driving transistors each have a channel width larger than that of at least either each of the load transistors or each of the access transistors.

    摘要翻译: 一种具有SRAM单元单元的半导体器件,每个SRAM单元包括一对第一驱动晶体管和第二驱动晶体管,一对第一负载晶体管和第二负载晶体管,以及一对第一存取晶体管和第二存取晶体管,其中 每个晶体管包括从衬底平面向上突出的半导体层,在半导体层的相对侧上延伸以跨越半导体层的顶部的栅极电极,插入在栅极电极和半导体之间的栅极绝缘膜 层,以及形成在半导体层中的一对源极/漏极区域; 并且第一和第二驱动晶体管的沟道宽度均大于至少任一个负载晶体管或每个存取晶体管的沟道宽度。

    Programmable Semiconductor Device
    92.
    发明申请
    Programmable Semiconductor Device 失效
    可编程半导体器件

    公开(公告)号:US20070247188A1

    公开(公告)日:2007-10-25

    申请号:US11628532

    申请日:2005-05-25

    IPC分类号: H03K19/177

    摘要: A programmable semiconductor device of the invention includes: processing element unit executing a predetermined operation; input/output connection unit acting as a signal input part and/or a signal output part in processing element unit; interconnecting unit, comprised of a plurality of wires, connecting processing element unit via input/output connection unit; bidirectional repeater unit, arranged between the intersection points of interconnecting unit, performing disconnection, or driving interconnecting unit in the forward direction or in the reverse direction; and interconnection connecting unit, arranged at the intersection point, connecting interconnecting unit at the intersection point.

    摘要翻译: 本发明的可编程半导体器件包括:执行预定操作的处理元件单元; 用作信号输入部分的输入/输出连接单元和/或处理元件单元中的信号输出部分; 由多根电线组成的互连单元,经由输入/输出连接单元连接处理元件单元; 双向中继器单元,布置在互连单元的交点之间,在正向或反向上执行断开或驱动互连单元; 和互连连接单元,布置在交点处,交叉点处连接互连单元。

    Substituted phenylpropionic acid derivatives
    94.
    发明授权
    Substituted phenylpropionic acid derivatives 失效
    取代苯基丙酸衍生物

    公开(公告)号:US07049342B2

    公开(公告)日:2006-05-23

    申请号:US10296206

    申请日:2001-05-25

    IPC分类号: A61K31/195 C07C235/52

    摘要: The invention provides novel substituted phenylpropionic acid derivatives that bind to the receptor as ligands of human peroxisome proliferator-activated receptor α (PPARα) to activate and exhibit potent lipid-decreasing action, and processes for preparing them.It relates to substituted phenylpropionic acid derivatives represented by a general formula (1) [wherein R1 denotes a lower alkyl group with carbon atoms of 1 to 4, lower alkoxy group with carbon atoms of 1 to 3, trifluoromethyl group, trifluoromethoxy group, phenyl group which is unsubstituted or may have substituents, phenoxy group which is unsubstituted or may have substituents or benzyloxy group which is unsubstituted or may have substituents, R2 denotes a hydrogen atom, lower alkyl group with carbon atoms of 1 to 4 or lower alkoxy group with carbon atoms of 1 to 3, R3 denotes a lower alkoxy group with carbon atoms of 1 to 3, and the binding mode of A portion denotes —CH2CONH—, —NHCOCH2—, —CH2CH2CO—, —CH2CH2CH2—, —CH2CH2O—, —CONHCH2—, —CH2NHCH2—, —COCH2O—, —OCH2CO—, —COCH2NH— or —CHCH2CO—], their pharmaceutically acceptable salts and their hydrates, and processes for preparing them.

    摘要翻译: 本发明提供新的取代的苯基丙酸衍生物,其结合受体作为人类过氧化物酶体增殖物激活受体α(PPARα)的配体,以活化并显示出有力的降脂作用,以及制备它们的方法。 它涉及由通式(1)表示的取代的苯基丙酸衍生物[其中R 1表示碳原子数为1〜4的低级烷基,碳原子数1〜3的低级烷氧基, 三氟甲基,三氟甲氧基,未取代或可具有取代基的苯基,未取代或可具有取代基的苯氧基或未取代或可具有取代基的苄氧基,R 2表示氢原子, 碳原子数为1〜3的碳原子数为1〜4的低级烷基,碳原子数1〜3的低级烷氧基,碳原子数为1〜3的低级烷氧基,A 部分表示-CH 2 CO 2,-NHCOCH 2 - , - CH 2 CH 2 CO-, - CH 2 CH 2 CH 2 - , - CH 2 CH 2 - O-(CH 2)2 CH 2 - ,-CONHCH 2 - , - CH 2 NHCH 2 - , - COCH 2 O - , - OCH 2 - CO - , - COCH 2 NH-或-CHCH 2 - CO-],它们的药学上可接受的盐和它们的水合物,以及它们的制备方法。

    Substituted benzylthiazolidine-2, 4-dione derivatives
    96.
    发明授权
    Substituted benzylthiazolidine-2, 4-dione derivatives 失效
    取代的苄基噻唑烷-2,4-二酮衍生物

    公开(公告)号:US06730687B1

    公开(公告)日:2004-05-04

    申请号:US10049645

    申请日:2002-02-25

    IPC分类号: A61K31426

    CPC分类号: C07D277/34

    摘要: The invention provides novel substituted benzylthiazolidine-2,4-dione derivatives that bind to receptor to activate as ligands of human peroxisome proliferator-activated receptor (PPAR) and exhibit blood glucose-decreasing action and lipid-decreasing action, and processes for preparing them. It relates to substituted benzylthiazolidine-2,4-dione derivatives represented by the general formula (1) [wherein the bond mode of A denotes —CH2CONH—, —NHCONH—, —CH2CH2CO— or —NHCOCH2—, and B denotes a lower alkyl group with carbon atoms of 1 to 4, lower alkoxy group with carbon atoms of 1 to 3, halogen atom, trifluoromethyl group, trifluoromethoxy group, phenyl group which is unsubstituted or may have substituents, phenoxy group which is unsubstituted or may have substituents or benzyloxy group which is unsubstituted or may have substituents], their medicinally acceptable salts, their hydrates and processes for preparing them.

    摘要翻译: 本发明提供了新的取代的苄基噻唑烷-2,4-二酮衍生物,其结合受体以作为人类过氧化物酶体增殖物激活受体(PPAR)的配体活化并显示出血糖降低作用和降脂作用,以及制备它们的方法。 它涉及由通式(1)表示的取代的苄基噻唑烷-2,4-二酮衍生物[其中A的键合模式表示-CH 2 CONH-,-NHCONH-,-CH 2 CH 2 CO-或-NHCOCH 2 - ,B表示低级烷基 具有1至4个碳原子的烷基,具有1至3个碳原子的低级烷氧基,卤素原子,三氟甲基,三氟甲氧基,未取代或可具有取代基的苯基,未被取代或可具有取代基的苯氧基或可具有取代基的苯氧基 未取代或可具有取代基的基团],它们的药学上可接受的盐,它们的水合物及其制备方法。

    Bidirectional bus-repeater controller
    97.
    发明授权
    Bidirectional bus-repeater controller 有权
    双向总线中继器控制器

    公开(公告)号:US06448810B1

    公开(公告)日:2002-09-10

    申请号:US09482513

    申请日:2000-01-14

    申请人: Masahiro Nomura

    发明人: Masahiro Nomura

    IPC分类号: H03K190175

    摘要: The present invention provides a bidirectional bus repeater controller comprising: a bidirectional bus line for bidirectional transmissions of signals; at least a bidirectional repeater on the bidirectional bus line for controlling bidirectional transmissions of signals on the bidirectional bus line; at least a bus driver connected to the bidirectional bus line for transmitting inputted signals to the bidirectional bus line in accordance with a bus driver control signal; at least a bus receiver connected to the bidirectional bus line for receiving signals from the bidirectional bus line; and a logic circuit extending along the bidirectional bus line and being connected to the at least bidirectional repeater for transmitting bidirectional bus repeater control signals to the at least bidirectional repeater upon input of the bus driver control signal.

    摘要翻译: 本发明提供了一种双向总线中继器控制器,包括:用于信号的双向传输的双向总线; 至少在双向总线上的双向中继器,用于控制双向总线上的信号的双向传输; 至少一个连接到双向总线的总线驱动器,用于根据总线驱动器控制信号将输入的信号发送到双向总线; 至少一个连接到双向总线的总线接收器,用于从双向总线接收信号; 以及逻辑电路,沿着所述双向总线延伸并且连接到所述至少双向中继器,用于在总线驱动器控制信号的输入时向所述至少双向中继器发送双向总线中继器控制信号。

    Data processor for generating pulse signal in response to external clock
including flipflop
    98.
    发明授权
    Data processor for generating pulse signal in response to external clock including flipflop 失效
    用于响应包括触发器的外部时钟产生脉冲信号的数据处理器

    公开(公告)号:US5377347A

    公开(公告)日:1994-12-27

    申请号:US676715

    申请日:1991-03-28

    IPC分类号: G06F1/14 G06F1/04 G06F1/24

    CPC分类号: G06F1/14

    摘要: A pulse generator includes an event counter receiving an external clock for counting the external clock, a first compare register coupled to the event counter for generating a first equal signal when a count value of the event counter becomes equal to a value set in the first compare register. The first equal signal is supplied to the event counter so as to clear the event counter. A free-running counter receives an internal clock for counting the internal clock, and a second compare register is coupled to the free-running counter for generating a second equal signal when a count value of the free-running counter becomes equal to a value set in the second compare register. A first flipflop is set by the first equal signal and reset by a write signal for the second compare register, and a second flipflop is set by the first equal signal, and reset by the second equal signal when the tint flipflop is in a reset condition, so as to generate an external pulse signal, so that even if the second equal signal is generated, the external pulse signal is never reset unless the first flipflop has been reset.

    摘要翻译: 脉冲发生器包括事件计数器,接收用于对外部时钟进行计数的外部时钟;耦合到事件计数器的第一比较寄存器,用于当事件计数器的计数值等于第一比较中设置的值时产生第一相等信号 寄存器。 第一个相等的信号被提供给事件计数器,以清除事件计数器。 自由运行的计数器接收用于对内部时钟进行计数的内部时钟,并且第二比较寄存器耦合到自由运行计数器,用于当自由运行计数器的计数值等于值设置时产生第二相等信号 在第二个比较寄存器。 第一触发器由第一相等信号设置,并由第二比较寄存器的写信号复位,第二触发器由第一相等信号设置,并且当色彩触发器处于复位条件时由第二等信号复位 ,以便产生外部脉冲信号,使得即使产生第二等信号,外部脉冲信号也不会复位,除非第一触发器被复位。

    System for detecting a runaway of a microcomputer
    99.
    发明授权
    System for detecting a runaway of a microcomputer 失效
    用于检测微型计算机失控的系统

    公开(公告)号:US5327362A

    公开(公告)日:1994-07-05

    申请号:US821787

    申请日:1992-01-16

    申请人: Masahiro Nomura

    发明人: Masahiro Nomura

    IPC分类号: G06F11/30 G06F11/00 G06F11/28

    CPC分类号: G06F11/0757 G06F11/28

    摘要: A system for detecting a runaway of a microcomputer includes a microcomputer which carries out a predetermined program having at least two detecting routines and supplies at least two passing signals by carrying out the detecting routines, and a control unit for detecting the at least two passing signals. The control unit provides a runaway signal representing that the runaway occurs, when at least one of the at least two passing signals is not detected in a predetermined time.

    摘要翻译: 用于检测微型计算机失控的系统包括:微型计算机,其执行具有至少两个检测例程的预定程序,并通过执行检测程序提供至少两个通过信号;以及控制单元,用于检测至少两个通过信号 。 当在预定时间内未检测到至少两个通过信号中的至少一个时,控制单元提供表示发生失控的失控信号。

    Queue having long word length
    100.
    发明授权
    Queue having long word length 失效
    长字长的队列

    公开(公告)号:US5241644A

    公开(公告)日:1993-08-31

    申请号:US728794

    申请日:1991-07-08

    IPC分类号: G06F5/10 G06F9/38

    摘要: A queue apparatus comprises a multi-stage queue latch for storing instruction codes or data in a first-in first-out manner; a first queue pointer associated with the queue latch for indicating a read position of an upper half place portion of the instruction codes or data stored in the queue latch and a second queue pointer associated with the queue latch for indicating a reading position of a lower half place portion of the instruction codes or data stored in the queue latch. An exchanger is coupled in order to the queue latch to receive the upper and lower half place portions of the instruction codes or data read out form the queue latch and for selectively exchanging the positions of the received upper and lower half place portions.

    摘要翻译: 队列装置包括用于以先进先出方式存储指令代码或数据的多级队列锁存器; 与队列锁存器相关联的用于指示存储在队列锁存器中的指令代码或数据的上半部分的读取位置的第一队列指针和与队列锁存器相关联的第二队列指针,用于指示下半部分的读取位置 存储在队列锁存器中的指令代码或数据的位置部分。 耦合交换器以便队列锁存器接收从队列锁存器读出的指令代码或数据的上半部分和下半部分,并且用于选择性地交换所接收的上半部分和下半部分的位置。