公开(公告)号：US20090308089A1

公开(公告)日：2009-12-17

申请号：US12485490

申请日：2009-06-16

申请人： Yoshinori Tanabe ,  Atsushi Ouchi ,  Yoshio Ozawa

发明人： Yoshinori Tanabe ,  Atsushi Ouchi ,  Yoshio Ozawa

IPC分类号： F25D21/06 ,  G05B15/00

CPC分类号： F25D21/002 ,  F25B5/02 ,  F25B2347/021 ,  F25B2400/22 ,  F25B2600/2513

摘要： An object of the present invention is to provide a control system, an integrated control apparatus, and a control program that are capable of well maintaining freshness and quality of food articles, by reducing time for performing a recovery operation following a frost removing operation of cooling devices. In response to a start of the frost removing operation of a first showcase, an integrated control apparatus provides a second device controller (device control unit) with a “lower limit cooling instruction (increase instruction)” to increase the refrigerant supplied to a second showcase to an amount larger than that before the frost removing operation starts. In response to the “lower limit cooling instruction (increase instruction),” the second device controller (device control unit) increases the amount of the refrigerant supplied to the second showcase.

摘要翻译： 本发明的目的是提供一种控制系统，综合控制装置和控制程序，其能够通过在冷却除霜操作之后减少执行恢复操作的时间来保持食品的新鲜度和质量 设备。 响应于第一展示柜的霜除去操作的开始，集成控制装置向第二设备控制器（设备控制单元）提供“下限冷却指令（增加指令）”，以增加供应到第二陈列柜的制冷剂 达到大于除霜操作开始之前的量。 响应于“下限制冷指令（增加指令）”，第二设备控制器（设备控制单元）增加供给第二陈列柜的制冷剂量。

公开(公告)号：US20090294828A1

公开(公告)日：2009-12-03

申请号：US12405474

申请日：2009-03-17

申请人： Yoshio Ozawa ,  Fumiki Aiso

发明人： Yoshio Ozawa ,  Fumiki Aiso

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L27/11578 ,  H01L21/8221 ,  H01L27/11568 ,  H01L27/11582

摘要： A nonvolatile semiconductor memory device includes: a semiconductor member; a memory film provided on a surface of the semiconductor member and being capable of storing charge; and a plurality of control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface. Average dielectric constant of a material interposed between one of the control gate electrodes and a portion of the semiconductor member located immediately below the control gate electrode adjacent to the one control gate electrode is lower than average dielectric constant of a material interposed between the one control gate electrode and a portion of the semiconductor member located immediately below the one control gate electrode.

摘要翻译： 非易失性半导体存储器件包括：半导体部件; 记录膜，设置在所述半导体构件的表面上并能够存储电荷; 以及设置在所述存储膜上的多个控制栅电极，彼此间​​隔开并且沿着与所述表面平行的方向布置。 插入在一个控制栅电极之间的材料和位于与控制栅电极相邻的控制栅电极正下方的部分的平均介电常数低于介于一个控制栅之间的材料的平均介电常数 电极和位于一个控制栅电极正下方的半导体部件的一部分。

公开(公告)号：US20090273021A1

公开(公告)日：2009-11-05

申请号：US12432453

申请日：2009-04-29

申请人： Katsuyuki SEKINE ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Yoshio Ozawa ,  Katsuaki Natori ,  Takashi Nakao

发明人： Katsuyuki SEKINE ,  Daisuke Nishida ,  Ryota Fujitsuka ,  Yoshio Ozawa ,  Katsuaki Natori ,  Takashi Nakao

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/4234 ,  H01L29/7887

摘要： A semiconductor device includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a charge storage layer on the tunnel insulating film, a block insulating film on the charge storage layer, and a control gate electrode on the block insulating film, the charge storage layer including a plurality of layers including first and second charge storage layers, the second charge storage layer being provided on a nearest side of the block insulating film, the first charge storage layer being provided between the tunnel insulating film and the second charge storage layer, the second charge storage layer having a higher trap density than the first charge storage layer, the second charge storage layer having a smaller band gap than the first charge storage layer, and the second charge storage layer having a higher permittivity than the first charge storage layer and a silicon nitride film.

摘要翻译： 半导体器件包括半导体衬底，半导体衬底上的隧道绝缘膜，隧道绝缘膜上的电荷存储层，电荷存储层上的块绝缘膜和块绝缘膜上的控制栅电极，电荷 存储层，包括包括第一和第二电荷存储层的多个层，所述第二电荷存储层设置在所述块绝缘膜的最近侧，所述第一电荷存储层设置在所述隧道绝缘膜和所述第二电荷存储层之间 所述第二电荷存储层具有比所述第一电荷存储层高的陷阱密度，所述第二电荷存储层具有比所述第一电荷存储层更小的带隙，并且所述第二电荷存储层具有比所述第一电荷存储层高的介电常数 层和氮化硅膜。

公开(公告)号：US07541233B2

公开(公告)日：2009-06-02

申请号：US12007751

申请日：2008-01-15

申请人： Yoshio Ozawa ,  Shigehiko Saida ,  Yuji Takeuchi ,  Masanobu Saito

发明人： Yoshio Ozawa ,  Shigehiko Saida ,  Yuji Takeuchi ,  Masanobu Saito

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/66825

摘要： A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上的非易失性存储单元，所述非易失性存储单元包括隧道绝缘膜，所述隧道绝缘膜具有在非易失性的沟道宽度方向周期性且连续变化的膜厚度 存储单元，设置在隧道绝缘膜上的浮置栅电极，设置在浮置栅电极上方的控制栅电极，以及设置在控制栅电极和浮栅之间的电极间绝缘膜。

公开(公告)号：US07414285B2

公开(公告)日：2008-08-19

申请号：US11870793

申请日：2007-10-11

申请人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

发明人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

IPC分类号： H01L27/108

CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513

摘要： A nonvolatile semiconductor memory device includes a first insulating film provided on a surface of a semiconductor substrate, a charge accumulation layer provided on the first insulating film, a second insulating film provided above the charge accumulation layer and contains silicon and nitrogen, a third insulating film provided on the second insulating film, and composed of a single-layer insulating film containing oxygen or a plural-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, relative dielectric constant thereof being larger than it of a silicon oxide film, a fourth insulating film provided on the third insulating film and contains silicon and nitrogen, a control gate provided above the fourth insulating film, and a fifth insulating film provided between the charge accumulation layer and the second insulating film or between the fourth insulating film and the control gate, and contains silicon and oxygen.

摘要翻译： 非易失性半导体存储器件包括设置在半导体衬底的表面上的第一绝缘膜，设置在第一绝缘膜上的电荷累积层，设置在电荷累积层上方并含有硅和氮的第二绝缘膜，第三绝缘膜 设置在第二绝缘膜上，并且由包含氧的单层绝缘膜或至少其顶层和底层上的膜含有氧的多层堆叠绝缘膜组成，其相对介电常数大于 氧化硅膜，设置在第三绝缘膜上并含有硅和氮的第四绝缘膜，设置在第四绝缘膜上方的控制栅极和设置在电荷累积层和第二绝缘膜之间的第五绝缘膜， 第四绝缘膜和控制栅，并含有硅和氧。

公开(公告)号：US20080176389A1

公开(公告)日：2008-07-24

申请号：US12054089

申请日：2008-03-24

申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

IPC分类号： H01L21/4763

CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层 元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上 门和控制门。

公开(公告)号：US20080087937A1

公开(公告)日：2008-04-17

申请号：US11870793

申请日：2007-10-11

申请人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

发明人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513

摘要： A nonvolatile semiconductor memory device includes a first insulating film provided on a surface of a semiconductor substrate, a charge accumulation layer provided on the first insulating film, a second insulating film provided above the charge accumulation layer and contains silicon and nitrogen, a third insulating film provided on the second insulating film, and composed of a single-layer insulating film containing oxygen or a plural-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, relative dielectric constant thereof being larger than it of a silicon oxide film, a fourth insulating film provided on the third insulating film and contains silicon and nitrogen, a control gate provided above the fourth insulating film, and a fifth insulating film provided between the charge accumulation layer and the second insulating film or between the fourth insulating film and the control gate, and contains silicon and oxygen.

摘要翻译： 非易失性半导体存储器件包括设置在半导体衬底的表面上的第一绝缘膜，设置在第一绝缘膜上的电荷累积层，设置在电荷累积层上方并含有硅和氮的第二绝缘膜，第三绝缘膜 设置在第二绝缘膜上，并且由包含氧的单层绝缘膜或至少其顶层和底层上的膜含有氧的多层堆叠绝缘膜组成，其相对介电常数大于 氧化硅膜，设置在第三绝缘膜上并含有硅和氮的第四绝缘膜，设置在第四绝缘膜上方的控制栅极和设置在电荷累积层和第二绝缘膜之间的第五绝缘膜， 第四绝缘膜和控制栅，并含有硅和氧。

公开(公告)号：US07306994B2

公开(公告)日：2007-12-11

申请号：US10915805

申请日：2004-08-11

申请人： Yoshitaka Tsunashima ,  Seiji Inumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

发明人： Yoshitaka Tsunashima ,  Seiji Inumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

IPC分类号： H01L21/8234

CPC分类号： H01L21/82345 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/31604 ,  H01L21/823462 ,  H01L21/823475 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6656

摘要： Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a laminated structure of an amorphous metal oxide film and metal silicate film, or a gate insulating film structure having a first gate insulating film including an oxide film of a first metal element and a second gate insulating film including a metal silicate film of a second metal element.

摘要翻译： 权利要求和公开的是一种半导体器件，包括具有在包含金属，硅和氧的金属硅酸盐的化合物中含有氮或氟的栅极绝缘膜结构的晶体管，具有非晶态金属氧化物层叠结构的栅极绝缘膜结构 膜和金属硅酸盐膜，或具有包括第一金属元素的氧化物膜的第一栅极绝缘膜和包括第二金属元素的金属硅酸盐膜的第二栅极绝缘膜的栅极绝缘膜结构。

公开(公告)号：US07303946B1

公开(公告)日：2007-12-04

申请号：US09559757

申请日：2000-04-27

申请人： Yoshio Ozawa ,  Yasumasa Suizu ,  Yoshitaka Tsunashima

发明人： Yoshio Ozawa ,  Yasumasa Suizu ,  Yoshitaka Tsunashima

IPC分类号： H01L21/00

CPC分类号： H01L29/7881 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02233 ,  H01L21/02271 ,  H01L21/28044 ,  H01L21/28202 ,  H01L21/28247 ,  H01L21/28273 ,  H01L21/3144 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/518 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66825 ,  H01L29/7833 ,  Y10S438/911 ,  Y10S438/942 ,  Y10S438/947 ,  Y10S438/966

摘要： A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate electrode and containing a dopant and arranged such that the gate electrode is formed on the gate electrode insulating film, and an oxidation process using ozone is performed to sufficiently round the shape of the lower edge of the gate electrode.

摘要翻译： 一种制造包含用作栅极绝缘膜并含有氮的氧化硅膜和用作栅电极并含有掺杂剂的多晶硅膜的MOS晶体管的方法，其布置使得栅电极形成在栅电极绝缘膜上 ，并且进行使用臭氧的氧化处理以充分地绕着栅电极的下边缘的形状。

公开(公告)号：US07294878B2

公开(公告)日：2007-11-13

申请号：US11088947

申请日：2005-03-25

申请人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

发明人： Masayuki Tanaka ,  Yoshio Ozawa ,  Hirokazu Ishida ,  Katsuaki Natori ,  Seiji Inumiya

IPC分类号： H01L27/108

CPC分类号： H01L29/7881 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513

摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate provided on each of the element formation regions through a first gate insulation film, a control gate provided on the floating gate through a second gate insulation film, and source/drain regions provided in the semiconductor substrate, wherein a mutual diffusion layer is provided at least at an interface between the second gate insulation film and the control gate.

摘要翻译： 半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中以限定多个元件形成区域;浮置栅极，通过第一栅极绝缘膜设置在每个元件形成区域上 ，通过第二栅极绝缘膜设置在浮置栅极上的控制栅极和设置在半导体衬底中的源极/漏极区域，其中至少在第二栅极绝缘膜和控制栅极之间的界面处设置相互扩散层。