Radio front end and power management architecture for LTE-advanced
    91.
    发明授权
    Radio front end and power management architecture for LTE-advanced 有权
    无线电前端和LTE高级电源管理架构

    公开(公告)号:US08774065B2

    公开(公告)日:2014-07-08

    申请号:US13460861

    申请日:2012-05-01

    IPC分类号: H04B7/00

    摘要: A front end radio architecture (FERA) with power management is disclosed. The FERA includes a first power amplifier (PA) block having a first-first PA and a first-second PA, and a second PA block having a second-first PA and a second-second PA. First and second modulated switchers are adapted to selectively supply power to the first-first PA and the second-first PA, and to supply power to the first-second PA and the second-second PA, respectively. The first and second modulated switchers have a modulation bandwidth of at least 20 MHz and are both suitable for envelope tracking modulation. A control system is adapted to selectively enable and disable the first-first PA, first-second PA, the second-first PA, and the second-second PA. First and second switches are responsive to control signals to route carriers and received signals between first and second antennas depending upon a selectable mode of operation such as intra-band or inter-band operation.

    摘要翻译: 公开了具有电源管理的前端无线电架构(FERA)。 FERA包括具有第一第一PA和第一秒PA的第一功率放大器(PA)块和具有第二第一PA和第二秒PA的第二PA块。 第一和第二调制切换器适于选择性地向第一优先PA和第二第一PA供电,并分别向第一秒PA和第二秒PA供电。 第一和第二调制切换器具有至少20MHz的调制带宽,并且都适用于包络跟踪调制。 控制系统适于选择性地启用和禁用第一优先PA,第一秒PA,第二优先PA和第二秒PA。 第一和第二开关响应于控制信号以根据诸如带内或频带间操作的可选择的操作模式在第一和第二天线之间路由载波和接收信号。

    LTE-Advanced (4G) front end radio architecture
    93.
    发明授权
    LTE-Advanced (4G) front end radio architecture 有权
    LTE-Advanced(4G)前端射频架构

    公开(公告)号:US08537723B2

    公开(公告)日:2013-09-17

    申请号:US13045604

    申请日:2011-03-11

    申请人: Nadim Khlat

    发明人: Nadim Khlat

    IPC分类号: H04B7/00

    摘要: A front end radio architecture (FERA) is disclosed that includes a power amplifier (PA). The PA includes first and second input terminals and first and second output terminals and a PA die having first and second half amplifier cells, each of which includes an output amplifier stage. The first and second half amplifier cells are coupled to the first and second input terminals. First and second PA transformers each include first, second, and third windings. The first windings are coupled to the output amplifier stages. The second winding of the first PA transformer is coupled to the first output terminal of the PA and also coupled in series with the second winding of the second PA transformer. The third winding of the first PA transformer is coupled in series with the third winding of the second PA transformer, with one end of the second PA transformer being coupled to the second output terminal of the PA.

    摘要翻译: 公开了一种包括功率放大器(PA)的前端无线电架构(FERA)。 PA包括第一和第二输入端子以及第一和第二输出端子以及具有第一和第二半放大器单元的PA管芯,每个具有输出放大器级。 第一和第二半放大器单元耦合到第一和第二输入端。 第一和第二PA变压器各自包括第一,第二和第三绕组。 第一绕组耦合到输出放大器级。 第一PA变压器的第二绕组耦合到PA的第一输出端,​​并且与第二PA变压器的第二绕组串联耦合。 第一PA变压器的第三绕组与第二PA变压器的第三绕组串联耦合,第二PA变压器的一端耦合到PA的第二输出端。

    SPLIT VCC AND COMMON VCC POWER MANAGEMENT ARCHITECTURE FOR ENVELOPE TRACKING
    94.
    发明申请
    SPLIT VCC AND COMMON VCC POWER MANAGEMENT ARCHITECTURE FOR ENVELOPE TRACKING 有权
    分离VCC和通用VCC电源管理架构进行包络跟踪

    公开(公告)号:US20130234793A1

    公开(公告)日:2013-09-12

    申请号:US13602856

    申请日:2012-09-04

    IPC分类号: H03G1/00

    CPC分类号: H03G1/00 H03F1/0227

    摘要: An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal.

    摘要翻译: 公开了一种包络跟踪电源和发射机控制电路。 发射机控制电路接收第一包络电源控制信号和第二包络电源控制信号。 信封跟踪电源以包括第一操作模式和第二操作模式的一组操作模式中的一种操作。 在第一操作模式和第二操作模式期间,基于第一包络电源控制信号将第一包络电源信号提供给驱动器级。 在第一操作模式期间,第二包络电源信号基于第一包络电源控制信号提供到最后级。 然而,在第二操作模式期间,第二包络电源信号基于第二包络电源控制信号提供到最后级。

    Half-bandwidth based quadrature analog-to-digital converter
    95.
    发明授权
    Half-bandwidth based quadrature analog-to-digital converter 有权
    基于半带宽的正交模数转换器

    公开(公告)号:US08525717B2

    公开(公告)日:2013-09-03

    申请号:US13209485

    申请日:2011-08-15

    申请人: Nadim Khlat

    发明人: Nadim Khlat

    IPC分类号: H03M1/12

    CPC分类号: H03M3/40

    摘要: A half-bandwidth based quadrature analog-to-digital converter (ADC) includes in-phase circuitry, quadrature-phase circuitry, and digital complex processing circuitry. The in-phase circuitry includes an in-phase pair of ADCs, which provide an in-phase pair of sub-quadrature output signals, based on an analog in-phase input signal. Similarly, the quadrature-phase circuitry includes a quadrature-phase pair of ADCs, which provide a quadrature-phase pair of sub-quadrature output signals based on an analog quadrature-phase input signal. The digital complex processing circuitry combines, filters, and restructures the in-phase pair of sub-quadrature output signals and the quadrature-phase pair of sub-quadrature output signals to provide a digital in-phase output signal and a digital quadrature-phase output signal. Each of the in-phase pair of ADCs has about an ADC bandwidth. The in-phase circuitry has an input bandwidth, which is about equal to two times the ADC bandwidth in one embodiment of the in-phase circuitry.

    摘要翻译: 基于半带宽的正交模数转换器(ADC)包括同相电路,正交相电路和数字复合处理电路。 同相电路包括基于模拟同相输入信号提供同相对的正交输出信号的同相ADC对。 类似地,正交相电路包括正交相位对的ADC,其基于模拟正交相位输入信号提供正交相位对的子正交输出信号。 数字复合处理电路组合,滤波和重组亚相位输出信号的同相对和子正交输出信号的正交相对,以提供数字同相输出信号和数字正交相输出 信号。 ADC的每个同相对具有ADC带宽。 同相电路具有在同相电路的一个实施例中约等于ADC带宽的两倍的输入带宽。

    Fast RF receiver DC offset correction
    96.
    发明授权
    Fast RF receiver DC offset correction 有权
    快速RF接收机直流偏移校正

    公开(公告)号:US08260235B1

    公开(公告)日:2012-09-04

    申请号:US12901171

    申请日:2010-10-08

    申请人: Nadim Khlat

    发明人: Nadim Khlat

    IPC分类号: H04B17/00 H04B1/10 H04B7/00

    CPC分类号: H04B1/30

    摘要: The present disclosure relates to down conversion circuitry that uses a fast DC correction method to correct for a DC offset of an RF mixer and a post mixer amplifier. The down conversion circuitry may include a DC correction amplifier downstream of the post mixer amplifier to apply a DC correction, which is based on a gain of the post mixer amplifier. During a calibration mode, the DC offset of the RF mixer and the post mixer amplifier are determined at multiple gain levels of the post mixer amplifier. The DC correction needed at multiple gain levels of the post mixer amplifier is then determined based on the determined DC offset. During a normal operation mode, a desired gain of the post mixer amplifier is selected and a determined DC correction that correlates with the desired gain is provided.

    摘要翻译: 本公开涉及使用快速DC校正方法校正RF混频器和后混频放大器的DC偏移的下变频电路。 下变频电路可以包括在后混频器放大器下游的DC校正放大器,以施加基于后混频器放大器的增益的DC校正。 在校准模式期间,RF混频器和后置混频器放大器的DC偏移在后置混频器放大器的多个增益电平下确定。 然后,基于所确定的DC偏移来确定后混频器放大器的多个增益电平所需的DC校正。 在正常操作模式期间,选择后混频器放大器的期望增益,并且提供与期望增益相关的确定的DC校正。

    POWER MANAGEMENT SYSTEM FOR MULTI-CARRIERS TRANSMITTER
    97.
    发明申请
    POWER MANAGEMENT SYSTEM FOR MULTI-CARRIERS TRANSMITTER 有权
    多载波发射机电源管理系统

    公开(公告)号:US20120176196A1

    公开(公告)日:2012-07-12

    申请号:US13343840

    申请日:2012-01-05

    申请人: Nadim Khlat

    发明人: Nadim Khlat

    IPC分类号: H03G3/20

    摘要: A power management system for a multi-carriers transmitter is disclosed. The power management system includes a first switcher having a control input and a power output, and a second switcher having a control input and a power output. Also included is a mode switch having a mode control input, wherein the mode switch is adapted to selectively couple the power output of the first switcher to the power output of the second switcher in response to a mode control signal received by the mode control input. Further included is a control system adapted to generate the mode control signal. The control system is coupled to the mode control input of the mode switch.

    摘要翻译: 公开了一种用于多载波发射机的电源管理系统。 电源管理系统包括具有控制输入和功率输出的第一切换器,以及具有控制输入和功率输出的第二切换器。 还包括具有模式控制输入的模式开关,其中模式开关适于响应于由模式控制输入接收的模式控制信号而选择性地将第一切换器的功率输出耦合到第二切换器的功率输出。 还包括适于产生模式控制信号的控制系统。 控制系统耦合到模式开关的模式控制输入。

    DC offset correction of a radio frequency receiver used with a continuous transmission radio frequency signal
    98.
    发明授权
    DC offset correction of a radio frequency receiver used with a continuous transmission radio frequency signal 有权
    与连续发射射频信号一起使用的射频接收机的直流偏移校正

    公开(公告)号:US08189707B1

    公开(公告)日:2012-05-29

    申请号:US12117282

    申请日:2008-05-08

    CPC分类号: H03G3/3042 H04B2001/0416

    摘要: The present invention relates to estimating a direct current (DC) offset of a radio frequency (RF) receiver when an estimated amplitude of a continuous-transmission amplitude-modulated (AM) RF signal is below a first threshold and when the RF receiver is not receiving an RF input signal. The estimated DC offset of the RF receiver may be used to improve RF receiver performance, particularly over temperature and supply voltage variations. Estimating the DC offset of the RF receiver when the estimated instantaneous amplitude of the continuous-transmission AM RF signal is below the first threshold may minimize errors in the estimated DC offset.

    摘要翻译: 本发明涉及当连续发射幅度调制(AM)RF信号的估计振幅低于第一阈值时以及当RF接收机不是时,估计射频(RF)接收机的直流(DC)偏移 接收RF输入信号。 RF接收机的估计直流偏移可用于提高RF接收机性能,特别是在温度和电源电压变化方面。 当连续传输AM RF信号的估计瞬时幅度低于第一阈值时,估计RF接收机的DC偏移可以使估计的DC偏移中的误差最小化。

    MULTI-MODE/MULTI-BAND POWER MANAGEMENT SYSTEM
    99.
    发明申请
    MULTI-MODE/MULTI-BAND POWER MANAGEMENT SYSTEM 有权
    多模/多电源管理系统

    公开(公告)号:US20120049953A1

    公开(公告)日:2012-03-01

    申请号:US13188024

    申请日:2011-07-21

    申请人: Nadim Khlat

    发明人: Nadim Khlat

    IPC分类号: H03G3/20

    CPC分类号: H03F1/0227 H03F1/0244

    摘要: A power management system for a radio frequency (RF) power amplifier (PA) load is disclosed. The power management system includes a first switching power supply that is adapted to output a relatively constant voltage, an electronic switch for selectively coupling the first switching power supply to the RF PA load, and a second switching power that is adapted to output a dynamic DC voltage to the RF PA load. The power management system further includes a control system that is adapted to close the electronic switch to supply the relatively constant DC voltage in addition to the dynamic DC voltage to the RF PA load in a first mode and to open the electronic switch wherein the relatively constant DC voltage is not supplied to the RF PA load in a second mode.

    摘要翻译: 公开了一种用于射频(RF)功率放大器(PA)负载的电源管理系统。 电源管理系统包括适于输出相对恒定电压的第一开关电源,用于将第一开关电源选择性地耦合到RF PA负载的电子开关,以及适于输出动态DC的第二开关电源 电压到RF PA负载。 电力管理系统还包括控制系统,其适于关闭电子开关以在第一模式中向RF PA负载提供除了动态DC电压之外的相对恒定的DC电压,并且打开电子开关,其中相对恒定 在第二模式下,不向RF PA负载提供直流电压。

    Phase dithered digital communications system
    100.
    发明授权
    Phase dithered digital communications system 有权
    相位抖动数字通信系统

    公开(公告)号:US08068573B1

    公开(公告)日:2011-11-29

    申请号:US11740967

    申请日:2007-04-27

    IPC分类号: H04L7/00 H03L7/00

    CPC分类号: H03K3/84 H03K7/04 H04B15/06

    摘要: The present invention is a phase dithered digital communications system that includes a digital receiver, and uses phase dithering to spread the energy of one or more system clocks to minimize receiver de-sensitization. Phase dithering uses a single frequency for each system clock; however, the energy of each system clock is spread over a range of frequencies by changing the duty-cycle of each clock half-cycle. A non-phase dithered clock drives the sampling clock of a receiver analog-to-digital converter to provide accurate correlation with received information, which may allow use of a higher frequency sampling clock than in frequency dithered designs. Phase dithered clocks and non-phase dithered clocks may have constant frequencies that are related to each other by a ratio of two integers; therefore, the time base used for extracting received data is always correlated and accurate.

    摘要翻译: 本发明是一种相位抖动数字通信系统,其包括数字接收机,并且使用相位抖动来扩展一个或多个系统时钟的能量以最小化接收机去敏感。 相位抖动对每个系统时钟使用单个频率; 然而,每个系统时钟的能量通过改变每个时钟半周期的占空比在一个频率范围内扩展。 非相抖动时钟驱动接收器模拟 - 数字转换器的采样时钟,以提供与接收信息的精确相关性,这可能允许使用比在频率抖动设计中更高频率的采样时钟。 相位抖动时钟和非相位抖动时钟可以具有通过两个整数的比率彼此相关的恒定频率; 因此,用于提取接收到的数据的时基总是相关和准确的。