摘要:
A superscalar microprocessor is provided which includes a integer functional unit and a floating point functional unit that share a high performance main data processing bus. The integer unit and the floating point unit also share a common reorder buffer, register file, branch prediction unit and load/store unit which all reside on the same main data processing bus. Instruction and data caches are coupled to a main memory via an internal address data bus which handles communications therebetween. An instruction decoder is coupled to the instruction cache and is capable of decoding multiple instructions per microprocessor cycle. Instructions are dispatched from the decoder in speculative order, issued out-of-order and completed out-of-order. Instructions are retired from the reorder buffer to the register file in-order. The functional units of the microprocessor desirably accommodate operands exhibiting multiple data widths. High performance and efficient use of the microprocessor die size are achieved by the sharing architecture of the disclosed superscalar microprocessor.
摘要:
An attitude sensing system utilizing simplified techniques and apparatus includes a Kalman filter which receives signals from an inertial measurement unit, a GPS receiver, and an integrated optical assembly. The output vector of the filter includes estimates of attitude misalignments and estimates of gyro drifts corresponding to the axes of the inertial measurement unit. The optical assembly includes a sensor array providing signals to the filter representing detection of the Earth's horizon or the center of the Sun. More particularly, a local vertical vector, computed from fore and aft detections of the Earth's horizon, is used in combination with GPS received signals to initially determine attitude by means of gyrocompassing. This attitude information is thereafter maintained by the inertial measurement unit and azimuth error resulting from drift of the inertial measurement unit and the initial gyrocompassing error is corrected by detections of the Earth's horizon and the Sun. The integrated optical assembly, used to detect the locations of both the Sun and Earth relative to the satellite, eliminates a need for separate apparatus dedicated to each sensing function. Moreover, the GPS receiver eliminates the need for ground tracking apparatus by providing the satellite ephemerides (including orbital pitch rate used in gyrocompassing) for use by the filter, rendering the attitude sensing system substantially autonomous. Additionally, the GPS receiver, in combination with the Sun and Earth detections, eliminates the need for a complex star tracker by providing an accurate inertial frame of reference.
摘要:
A method and apparatus are described for expanding the capability of an instruction prefetch buffer. The method and apparatus enables the instruction prefetch buffer to distinguish between old prefetches that occurred before a branch in an instruction stream and new prefetches which occurred after the branch in the instruction stream. A control tag is generated each time a request for an instruction is sent to a storage. The returning instruction has appended thereto the original control tag which is then compared to the current value of control tag in the instruction prefetch buffer. If the two values match, then this is an indication that a branch has not occurred and the instruction is still required. However, if the two values of the control tag are not equal, then this is an indication that a branch in the instruction stream has occurred and that the instruction being sent from storage to the buffer is no longer required. The method and apparatus are also applicable to the use of branch-with-execute instructions wherein a subject instruction is executed immediately following the branch-with-execute instruction. The execution of this subject instruction before the branch target instruction enables the system processor to continue operating while it is waiting for the branch target instruction.
摘要:
Methods and apparatus are disclosed for transferring data to and from a first bus, to which a first set of high performance devices, including at least one central processing unit ("CPU") is attached, and a second bus, to which a second set of relatively lower performance devices is attached. More particularly the invention accomplishes the above transfer function in a manner that facilitates communication between the first and second set of devices from the compartively lower performance of the second set of devices. According to the preferred embodiment of the invention, a data transfer controller i.e., ("DTC") is disclosed that includes a set of direct memory access ("DMA") channels and an input/output controller comprising a set of address mapped I/O ports. Both the DMA channels and I/O ports may be used to transfer data between the high performance channel (hereinafter referred to as the "Local Bus") coupled to the CPU in a reduced instruction set computer (RISC) system and a typically lower performance, peripheral bus (hereinafter referred to as a "Remote Bus"). The resulting DTC interface between the Local Bus and a Remote Bus permits a wide performance range of standard peripheral devices to be attached to the RISC system in a manner that does not limit system performance.
摘要:
A body portion is supported in upright position by a support stem and has wind propelling blades arranged to rotatably drive the body portion when subjected to air currents. The body portion has front and rear surfaces one of which may support a rear view mirror and the other of which may support a reflector. The body portion has a lock nut for holding it stationary on the stem, for allowing rotation thereof when released. The body portion has forward and rearward as well as lateral adjustable positioning on the stem, and the stem has lateral positioning on a bracket that mounts it on a vehicle.
摘要:
Methods and apparatus are set forth for transferring data to and from a first bus, to which a first set of high performance devices, including at least one central processing unit ("CPU") is attached, and a second bus, to which a second set of relatively lower performance devices is attached. The aforesaid transfer is accomplished in a manner that facilitates communication between the first and second set of devices while insulating the performance of the first set of devices from the comparatively lower performance of the second set of devices. According to the preferred embodiment of the invention, an input/output controller i.e., ("IOC") is disclosed that includes a set of address mapped I/O ports. The I/O ports may be used to transfer data between the high performance channel (hereinafter referred to as the "Local Bus") coupled to the CPU in a reduced instruction set computer (RISC) system and a typically lower performance, peripheral bus (hereinafter referred to as a "Remote Bus"). The resulting IOC interface between the Local Bus and Remote Bus permits a wide performance range of standard peripheral devices to be attached to the RISC system in a manner that does not limit system performance. The IOC may be used as part of a data transfer controller ("DTC") having other components, such as direct memory access components, or may be used independently for transferring data between unmatched buses in, for example, RISC and non-RISC systems and data transmission systems generally.
摘要:
In a data processing system, particularly one implemented by a microprocessor, apparatus is provided for bypassing the main parallel information bus between the processor and main storage unit by a serial information bus for testing purposes. Serial test information is applied through the serial information bus to a storage control unit which interfaces the processor and storage unit. The control includes circuitry for converting the information from the serial bus into the parallel format of the data which is provided from the processor along the main parallel bus. The test information applied has the same commands and address structure as the information output from the central processor. As a result, when the serial test information is converted to parallel format, by the apparatus, it will be indistinguishable from parallel data applied directly from the processor along the parallel bus.
摘要:
A baby bottle holder having an enclosure into which the bottle is inserted. A curved surface of the holder permits rocking of the holder upon the bottle being emptied. A weight in the holder imparts rocking movement to the holder upon termination of nursing effort by the infant. An internal wall of the holder insulates the bottle as well as defines air passageways to ease bottle insertion and removal.
摘要:
A method and apparatus expands the capability of an instruction prefetch buffer. The method and apparatus enables the instruction prefetch buffer to distinguish between old prefetches that occurred before a branch in an instruction stream and new prefetches which occurred after the branch in the instruction stream. A control tag is generated each time a request for an instruction is sent to a storage. The returning instruction has appended thereto the original control tag which is then compared to the current value of control tag in the instruction prefetch buffer. If the two values match, then this is an indication that a branch has not occurred and the instruction is still required. However, if the two values of the control tag are not equal, then this is an indication that a branch in the instruction stream has occurred and that the instruction being sent from storage to the buffer is no longer required. The method and apparatus are also applicable to the use of branch-with-execute instructions wherein a subject instruction is executed immediately following the branch-with-execute instruction. The execution of this subject instruction before the branch target instruction enables the system processor to continue operating while it is waiting for the branch target instruction.
摘要:
A low diffraction-feedback high-energy laser system includes an injection laser, a master oscillator power amplifier (MOPA), and means for aligning the injection laser to the MOPA. The alignment means includes a relay mirror and sensor array cooperative to center the injection laser externally of the cavity, and the alignment means further includes a relay mirror and cooperative optics and sensor to center the injection laser interiorly of the cavity. Means are disclosed preferably for balancing the heat distribution on both sides of one cavity mirror of the master oscillator power amplifier cavity to maintain its figure undistorted against thermal loading. A composite sensor for providing a dual-sensing capability is disclosed including a mosaic array and a superposed quad sensor. The master oscillator power amplifier preferably includes a convex and a concave cavity reflector. In one embodiment, an intracavity laser separator is disclosed for providing alignment of the injection laser, and in a further embodiment an extracavity laser separator is disclosed for providing injection laser alignment. In both embodiments, a sensor mounted to the convex reflector is operative to provide a signal indication of cavity turbulence.