公开(公告)号：US20160027924A1

公开(公告)日：2016-01-28

申请号：US14875101

申请日：2015-10-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Hiroshi KANEMURA ,  Yasuharu HOSAKA ,  Shuhei YOKOYAMA ,  Toshimitsu OBONAI

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  G01R31/2656 ,  G09G3/006 ,  G09G3/3225 ,  G09G3/3648 ,  H01L27/14678 ,  H01L27/14692 ,  H01L29/22

Abstract: A semiconductor layer with a low density of trap states is provided. A transistor with stable electrical characteristics is provided. A transistor having high field-effect mobility is provided. A semiconductor device including the transistor is provided. A method for evaluating a semiconductor layer is provided. A method for evaluating a transistor is provided. A method for evaluating a semiconductor device is provided. Provided is, for example, a semiconductor layer with a low defect density which can be used for a channel formation region of a transistor, a transistor including a semiconductor layer with a low defect density in a channel formation region, or a semiconductor device including the transistor.

Abstract translation: 提供了具有低密度陷阱状态的半导体层。 提供具有稳定电特性的晶体管。 提供具有高场效应迁移率的晶体管。 提供包括晶体管的半导体器件。 提供了一种用于评估半导体层的方法。 提供了一种用于评估晶体管的方法。 提供了一种用于评估半导体器件的方法。 例如，提供了可以用于晶体管的沟道形成区域的具有低缺陷密度的半导体层，在沟道形成区域中包括具有低缺陷密度的半导体层的晶体管，或包括晶体管的半导体器件 晶体管。

公开(公告)号：US20150325600A1

公开(公告)日：2015-11-12

申请号：US14804508

申请日：2015-07-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro SAKATA ,  Toshinari SASAKI ,  Miyuki HOSOBA

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Abstract translation: 目的在于提供一种利用具有稳定电特性的晶体管稳定工作的显示装置。 在使用其中使用氧化物半导体层作为沟道形成区域的晶体管的显示装置的制造中，栅电极进一步设置在至少施加到驱动电路的晶体管上。 在将氧化物半导体层用于沟道形成区域的晶体管的制造中，对氧化物半导体层进行热处理以脱水或脱氢; 因此，存在于氧化物半导体层和栅极绝缘层之间的界面处的杂质，其存在于氧化物半导体层下方并与氧化物半导体层接触，以及氧化物半导体层与设置在该氧化物半导体层上的与保护绝缘层接触的界面 可以减少氧化物半导体层。

公开(公告)号：US20150194509A1

公开(公告)日：2015-07-09

申请号：US14666753

申请日：2015-03-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki OHARA ,  Toshinari SASAKI

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/477 ,  H01L21/02 ,  H01L21/441

CPC classification number: H01L29/66969 ,  C01G15/006 ,  C01G45/006 ,  C01G49/009 ,  C01G51/006 ,  C01G53/006 ,  C01P2002/52 ,  C01P2006/40 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02183 ,  H01L21/02266 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.

Abstract translation: 目的是提供一种具有有利特性的半导体元件的半导体器件。 本发明的制造方法包括以下步骤：在衬底上形成用作栅电极的第一导电层; 形成第一绝缘层以覆盖所述第一导电层; 在所述第一绝缘层上形成半导体层，使得所述半导体层的一部分与所述第一导电层重叠; 形成与半导体层电连接的第二导电层; 形成覆盖半导体层和第二导电层的第二绝缘层; 形成与第二导电层电连接的第三导电层; 在形成半导体层之后并在形成第二绝缘层之前进行第一热处理; 以及在形成所述第二绝缘层之后进行第二热处理。

公开(公告)号：US20150084050A1

公开(公告)日：2015-03-26

申请号：US14560259

申请日：2014-12-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Kosei NODA ,  Yuhei SATO ,  Yuta ENDO

IPC: H01L29/786 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42364

Abstract: Hydrogen concentration and oxygen vacancies in an oxide semiconductor film are reduced. Reliability of a semiconductor device which includes a transistor using an oxide semiconductor film is improved. One embodiment of the present invention is a semiconductor device which includes a base insulating film; an oxide semiconductor film formed over the base insulating film; a gate insulating film formed over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween. The base insulating film shows a signal at a g value of 2.01 by electron spin resonance. The oxide semiconductor film does not show a signal at a g value of 1.93 by electron spin resonance.

Abstract translation: 氧化物半导体膜中的氢浓度和氧空位减少。 提高了包括使用氧化物半导体膜的晶体管的半导体器件的可靠性。 本发明的一个实施例是一种半导体器件，其包括基底绝缘膜; 形成在所述基底绝缘膜上的氧化物半导体膜; 形成在所述氧化物半导体膜上的栅极绝缘膜; 以及与氧化物半导体膜重叠的栅电极，其间设置有栅极绝缘膜。 基极绝缘膜通过电子自旋共振显示出g值为2.01的信号。 氧化物半导体膜通过电子自旋共振不显示g值为1.93的信号。

公开(公告)号：US20150072470A1

公开(公告)日：2015-03-12

申请号：US14540184

申请日：2014-11-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Kosei NODA ,  Hiroki OHARA ,  Toshinari SASAKI ,  Junichiro SAKATA

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/477

CPC classification number: H01L29/66969 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/7869

Abstract: A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region is an oxide semiconductor layer, heat treatment which reduces impurities such as moisture to improve the purity of the oxide semiconductor layer and oxidize the oxide semiconductor layer (heat treatment for dehydration or dehydrogenation) is performed. Not only impurities such as moisture in the oxide semiconductor layer but also those existing in a gate insulating layer are reduced, and impurities such as moisture existing in interfaces between the oxide semiconductor layer and films provided over and under and in contact with the oxide semiconductor layer are reduced.

Abstract translation: 一种高度可靠的半导体器件及其制造方法，其包括具有稳定电特性的薄膜晶体管。 在包括具有沟道形成区域的半导体层是氧化物半导体层的薄膜晶体管的半导体器件的制造方法中，减少诸如水分的杂质的热处理以提高氧化物半导体层的纯度并氧化氧化物 进行半导体层（脱水或脱氢的热处理）。 氧化物半导体层中的水分等杂质，以及存在于栅极绝缘层中的杂质都会降低，氧化物半导体层和氧化物半导体层之间的界面中存在的水分等杂质与氧化物半导体层 减少了

公开(公告)号：US20150060853A1

公开(公告)日：2015-03-05

申请号：US14537232

申请日：2014-11-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Kosei NODA ,  Yuta ENDO

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/24 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. A p-type oxide semiconductor material is contained in an n-type oxide semiconductor film, whereby carriers which are generated in the oxide semiconductor film without intention can be reduced. This is because electrons generated in the n-type oxide semiconductor film without intention are recombined with holes generated in the p-type oxide semiconductor material to disappear. Accordingly, it is possible to reduce carriers which are generated in the oxide semiconductor film without intention.

Abstract translation: 通过对使用氧化物半导体膜的晶体管赋予稳定的电特性来制造高可靠性的半导体器件。 p型氧化物半导体材料包含在n型氧化物半导体膜中，由此可以减少在氧化物半导体膜中产生的载流子。 这是因为在n型氧化物半导体膜中产生的电子没有意图与在p型氧化物半导体材料中产生的空穴重新组合而消失。 因此，可以无意地减少在氧化物半导体膜中产生的载流子。

公开(公告)号：US20150011049A1

公开(公告)日：2015-01-08

申请号：US14328060

申请日：2014-07-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Hiroki OHARA ,  Junichiro SAKATA

IPC: H01L29/66 ,  H01L21/306 ,  H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02164 ,  H01L21/02565 ,  H01L21/30604 ,  H01L29/45 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.

Abstract translation: 目的在于提供一种具有稳定电特性的薄膜晶体管的高度可靠的半导体装置。 此外，另一个目的是以高生产率以低成本制造高度可靠的半导体器件。 在包括具有作为沟道形成区域的氧化物半导体层的薄膜晶体管的半导体器件的制造方法中，在氮气气氛下加热氧化物半导体层以降低其电阻，从而形成低电阻氧化物半导体层。 此外，选择性地增加与栅电极层重叠的低电阻氧化物半导体层的区域的电阻，从而形成高电阻氧化物半导体层。 通过溅射法形成与氧化物半导体层接触的氧化硅膜，可提高氧化物半导体层的电阻。

公开(公告)号：US20140346508A1

公开(公告)日：2014-11-27

申请号：US14456330

申请日：2014-08-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Toshinari SASAKI

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/10 ,  H01L29/41733 ,  H01L29/41775

Abstract: Provided is a semiconductor device including a transistor with large on-state current even when it is miniaturized. The transistor includes a pair of first conductive films over an insulating surface; a semiconductor film over the pair of first conductive films; a pair of second conductive films, with one of the pair of second conductive films and the other of the pair of second conductive films being connected to one of the pair of first conductive films and the other of the pair of first conductive films, respectively; an insulating film over the semiconductor film; and a third conductive film provided in a position overlapping with the semiconductor film over the insulating film. Further, over the semiconductor film, the third conductive film is interposed between the pair of second conductive films and away from the pair of second conductive films.

Abstract translation: 提供了即使在小型化时也具有大导通状态的晶体管的半导体装置。 晶体管包括在绝缘表面上的一对第一导电膜; 在一对第一导电膜上的半导体膜; 一对第二导电膜，其中一对第二导电膜中的一个和一对第二导电膜中的另一个分别连接到一对第一导电膜中的一个和一对第一导电膜中的另一个; 半导体膜上的绝缘膜; 以及设置在与绝缘膜上的半导体膜重叠的位置的第三导电膜。 此外，在半导体膜之上，第三导电膜插入在一对第二导电膜之间并远离一对第二导电膜。

公开(公告)号：US20140342498A1

公开(公告)日：2014-11-20

申请号：US14448015

申请日：2014-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta ENDO ,  Toshinari SASAKI ,  Kosei NODA

IPC: H01L29/66 ,  H01L29/51 ,  H01L29/423 ,  H01L21/477 ,  H01L21/425

CPC classification number: H01L29/66969 ,  H01L21/02 ,  H01L21/02112 ,  H01L21/02403 ,  H01L21/28 ,  H01L21/425 ,  H01L21/477 ,  H01L29/42384 ,  H01L29/518 ,  H01L29/78618 ,  H01L29/7869

Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.

Abstract translation: 使用其中氧化物半导体包括在沟道区域中的晶体管制造半导体器件，并且不太可能引起由于短沟道效应引起的电特性的变化。 半导体器件包括具有一对氧氮化物半导体区域的氧化物半导体膜，该氧氮化物半导体区域包括氮和夹在一对氧氮化物半导体区域之间的氧化物半导体区域，栅极绝缘膜和设置在氧化物半导体区域上的栅电极，栅极绝缘 胶片位于其间。 这里，一对氧氮化物半导体区域用作晶体管的源极区域和漏极区域，氧化物半导体区域用作晶体管的沟道区域。

公开(公告)号：US20140319520A1

公开(公告)日：2014-10-30

申请号：US14331460

申请日：2014-07-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro SAKATA ,  Takashi SHIMAZU ,  Hiroki OHARA ,  Toshinari SASAKI ,  Shunpei YAMAZAKI

IPC: H01L29/16 ,  H01L29/786

CPC classification number: H01L29/16 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/1225 ,  H01L29/78618 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiOx. The source and drain regions are formed using an oxide semiconductor layer which does not include SiOx or an oxynitiride film.

Abstract translation: 本发明的目的是提供一种包括具有氧化物半导体层并具有高电特性的薄膜晶体管的半导体器件。 在沟道形成区域中使用包含SiO x的氧化物半导体层，为了降低与使用具有低电阻的金属材料形成的源极和漏极电极层的接触电阻，源极和漏极电极层之间提供源极和漏极区域 和包含SiOx的氧化物半导体层。 源极和漏极区域使用不包括SiO x或氧氮化物膜的氧化物半导体层形成。