公开(公告)号：US20240234432A1

公开(公告)日：2024-07-11

申请号：US18616403

申请日：2024-03-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro SAKATA ,  Toshinari SASAKI ,  Miyuki HOSOBA

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

公开(公告)号：US20190157499A1

公开(公告)日：2019-05-23

申请号：US16196045

申请日：2018-11-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Suzunosuke HIRAISHI

IPC: H01L33/00 ,  H01L27/12 ,  H01L29/786

Abstract: Disclosed is a semiconductor device comprising a thin film transistor and wirings connected to the thin film transistor, in which the thin film transistor has a channel formation region in an oxide semiconductor layer, and a copper metal is used for at least one of a gate electrode, a source electrode, a drain electrode, a gate wiring, a source wiring, and a drain wiring. The extremely low off current of the transistor with the oxide semiconductor layer contributes to reduction in power consumption of the semiconductor device. Additionally, the use of the copper metal allows the combination of the semiconductor device with a display element to provide a display device with high display quality and negligible defects, which results from the low electrical resistance of the wirings and electrodes formed with the copper metal.

公开(公告)号：US20170005204A1

公开(公告)日：2017-01-05

申请号：US15265936

申请日：2016-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroki OHARA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L21/67 ,  H01L21/477 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/78696 ,  G02F1/133528 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/133302 ,  G02F2001/133531 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L21/02107 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/02672 ,  H01L21/324 ,  H01L21/477 ,  H01L21/67115 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/66969 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to −40° C., still preferably lower than or equal to −50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.

Abstract translation: 目的在于提供一种使用氧化物半导体的具有稳定电特性的半导体器件。 在氮气或惰性气体气氛（例如氩气或氦气）或减压下对氧化物半导体层进行脱水或脱氢处理的热处理，并进行用于在 氧气和氮气气氛或空气（露点优选低于或等于-40℃，更优选低于或等于-50℃）气氛。 因此，氧化物半导体层被高度纯化，从而形成i型氧化物半导体层。 制造包括具有氧化物半导体层的薄膜晶体管的半导体器件。

公开(公告)号：US20160020330A1

公开(公告)日：2016-01-21

申请号：US14805599

申请日：2015-07-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroki OHARA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L21/324 ,  H01L21/02

CPC classification number: H01L29/78696 ,  G02F1/133528 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/133302 ,  G02F2001/133531 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L21/02107 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/02672 ,  H01L21/324 ,  H01L21/477 ,  H01L21/67115 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/66969 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to −40° C., still preferably lower than or equal to −50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.

Abstract translation: 目的在于提供一种使用氧化物半导体的具有稳定电特性的半导体器件。 在氮气或惰性气体气氛（例如氩气或氦气）或减压下对氧化物半导体层进行脱水或脱氢处理的热处理，并进行用于在 氧气和氮气气氛或空气（露点优选低于或等于-40℃，更优选低于或等于-50℃）气氛。 因此，氧化物半导体层被高度纯化，从而形成i型氧化物半导体层。 制造包括具有氧化物半导体层的薄膜晶体管的半导体器件。

公开(公告)号：US20150380566A1

公开(公告)日：2015-12-31

申请号：US14822995

申请日：2015-08-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunichi ITO ,  Toshinari SASAKI ,  Miyuki HOSOBA ,  Junichiro SAKATA

IPC: H01L29/786 ,  G09G3/20

CPC classification number: H01L27/1225 ,  G09G3/20 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/247 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.

Abstract translation: 目的是控制氧化物半导体的组成和缺陷，另一个目的是增加薄膜晶体管的场效应迁移率，并获得具有减小的截止电流的足够的开 - 关比。 解决方案是使用其组成由InMO 3（ZnO）m表示的氧化物半导体，其中M是选自Ga，Fe，Ni，Mn，Co和Al中的一种或多种元素，m优选为非 - 整数大于0且小于1. Zn的浓度低于In和M的浓度。氧化物半导体具有无定形结构。 可以提供氧化物和氮化物层以防止氧化物半导体的污染和劣化。

公开(公告)号：US20150303072A1

公开(公告)日：2015-10-22

申请号：US14790668

申请日：2015-07-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

IPC: H01L21/477 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L21/477 ,  G02F1/133345 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

Abstract translation: 本发明的目的是提供具有优异显示特性的显示装置，其中使用具有对应于各个电路的特性的不同结构的晶体管形成设置在一个基板上的像素电路和驱动电路。 驱动器电路部分包括驱动电路晶体管，其中使用金属膜形成栅电极层，源电极层和漏电极层，并且使用氧化物半导体形成沟道层。 像素部分包括其中使用氧化物导体形成栅电极层，源电极层和漏电极层的像素晶体管，并且使用氧化物半导体形成半导体层。 像素晶体管使用透光材料形成，因此可以制造具有较高开口率的显示装置。

公开(公告)号：US20140209901A1

公开(公告)日：2014-07-31

申请号：US14228663

申请日：2014-03-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro SAKATA ,  Toshinari SASAKI ,  Miyuki HOSOBA

IPC: H01L29/786

CPC classification number: H01L27/1225 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Abstract translation: 目的在于提供一种利用具有稳定电特性的晶体管稳定工作的显示装置。 在使用其中使用氧化物半导体层作为沟道形成区域的晶体管的显示装置的制造中，栅电极进一步设置在至少施加到驱动电路的晶体管上。 在将氧化物半导体层用于沟道形成区域的晶体管的制造中，对氧化物半导体层进行热处理以脱水或脱氢; 因此，存在于氧化物半导体层和栅极绝缘层之间的界面处的杂质，其存在于氧化物半导体层下方并与氧化物半导体层接触，以及氧化物半导体层与设置在该氧化物半导体层上的与保护绝缘层接触的界面 可以减少氧化物半导体层。

公开(公告)号：US20130280857A1

公开(公告)日：2013-10-24

申请号：US13917012

申请日：2013-06-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masashi TSUBUKU ,  Shuhei YOSHITOMI ,  Takahiro TUJI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroyuki TOMATSU ,  Masahiko HAYAKAWA

IPC: H01L29/66

CPC classification number: H01L27/1262 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02631 ,  H01L21/02667 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/7869

Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

公开(公告)号：US20170084750A1

公开(公告)日：2017-03-23

申请号：US15368984

申请日：2016-12-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/51 ,  H01L27/12

CPC classification number: H01L29/78606 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/1345 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/13606 ,  G02F2201/123 ,  G09G3/344 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/3262 ,  H01L29/45 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

公开(公告)号：US20160329359A1

公开(公告)日：2016-11-10

申请号：US15217177

申请日：2016-07-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masashi TSUBUKU ,  Shuhei YOSHITOMI ,  Takahiro TSUJI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hiroyuki TOMATSU ,  Masahiko HAYAKAWA

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L27/1262 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02631 ,  H01L21/02667 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/7869

Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.