公开(公告)号：US20220359433A1

公开(公告)日：2022-11-10

申请号：US17869296

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen Hsin Wei ,  Hsien-Pin Hu ,  Shang-Yun Hou ,  Weiming Chris Chen

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/58

Abstract: A method includes performing a first light-exposure and a second a second light-exposure on a photo resist. The first light-exposure is performed using a first lithograph mask, which covers a first portion of the photo resist. The first portion of the photo resist has a first strip portion exposed in the first light-exposure. The second light-exposure is performed using a second lithograph mask, which covers a second portion of the photo resist. The second portion of the photo resist has a second strip portion exposed in the second light-exposure. The first strip portion and the second strip portion have an overlapping portion that is double exposed. The method further includes developing the photo resist to remove the first strip portion and the second strip portion, etching a dielectric layer underlying the photo resist to form a trench, and filling the trench with a conductive feature.

公开(公告)号：US20220359231A1

公开(公告)日：2022-11-10

申请号：US17815434

申请日：2022-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih Ting Lin ,  Szu-Wei Lu ,  Kuo-Chiang Ting ,  Shang-Yun Hou ,  Chi-Hsi Wu ,  Weiming Chris Chen

IPC: H01L21/56 ,  H01L21/768 ,  H01L21/48 ,  H01L23/538

Abstract: A method includes attaching semiconductor devices to an interposer structure, attaching the interposer structure to a first carrier substrate, attaching integrated passive devices to the first carrier substrate, forming an encapsulant over the semiconductor devices and the integrated passive devices, debonding the first carrier substrate, attaching the encapsulant and the semiconductor devices to a second carrier substrate, forming a first redistribution structure on the encapsulant, the interposer structure, and the integrated passive devices, wherein the first redistribution structure contacts the interposer structure and the integrated passive devices, and forming external connectors on the first redistribution structure.

公开(公告)号：US11493689B2

公开(公告)日：2022-11-08

申请号：US16930558

申请日：2020-07-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Kuo-Chiang Ting ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Chi-Hsi Wu

IPC: G02B6/122 ,  G02B6/12

Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

公开(公告)号：US11454773B2

公开(公告)日：2022-09-27

申请号：US17121060

申请日：2020-12-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Sung-Hui Huang ,  Kuan-Yu Huang ,  Kuo-Chiang Ting ,  Shang-Yun Hou ,  Chi-Hsi Wu

IPC: G02B6/42 ,  H01L23/00 ,  H01L23/48

Abstract: A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

公开(公告)号：US11450580B2

公开(公告)日：2022-09-20

申请号：US16920408

申请日：2020-07-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Chien-Yuan Huang

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/04 ,  H01L21/52 ,  H01L23/31

Abstract: A semiconductor structure and a method for fabricating the same are disclosed. A semiconductor structure includes a first substrate, a package, a second substrate, and a lid. The package is attached to a first side of the first substrate. The second substrate is attached to a second side of the first substrate. The lid is connected to the first substrate and the second substrate. The lid includes a ring part over the first side of the first substrate. The ring part and the first substrate define a space and the package is accommodated in the space. The lid further includes a plurality of overhang parts which extend from corner sidewalls of the ring part toward the second substrate to cover corner sidewalls of the first substrate.

公开(公告)号：US11373946B2

公开(公告)日：2022-06-28

申请号：US16830284

申请日：2020-03-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Ming Huang ,  Ping-Kang Huang ,  Sao-Ling Chiu ,  Shang-Yun Hou

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.

公开(公告)号：US20220099887A1

公开(公告)日：2022-03-31

申请号：US17340363

申请日：2021-06-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Kuo-Chiang Ting ,  Jiun Yi Wu ,  Hung-Yi Kuo ,  Shang-Yun Hou

IPC: G02B6/12 ,  H01L23/00 ,  H01L31/02 ,  H01L31/0232 ,  H01L25/16 ,  H01L25/18

Abstract: A package includes silicon waveguides on a first side of an oxide layer; photonic devices on the first side of the oxide layer, wherein the photonic devices are coupled to the silicon waveguides; redistribution structures over the first side of the oxide layer, wherein the redistribution structures are electrically connected to the photonic devices; a hybrid interconnect structure on a second side of the oxide layer, wherein the hybrid interconnect structure includes a stack of silicon nitride waveguides that are separated by dielectric layers; and through vias extending through the hybrid interconnect structure and the oxide layer, wherein the through vias make physical and electrical connection to the redistribution structures.

公开(公告)号：US11222867B1

公开(公告)日：2022-01-11

申请号：US16924203

申请日：2020-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sung-Hui Huang ,  Shang-Yun Hou ,  Kuan-Yu Huang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A package includes a first die, a second die, a semiconductor frame, and a reinforcement structure. The first di has a first surface and a second surface opposite to the first surface. The first die includes grooves on the first surface. The second die and the semiconductor frame are disposed side by side over the first surface of the first die. The semiconductor frame has at least one notch exposing the grooves of the first die. The reinforcement structure is disposed on the second surface of the first die. The reinforcement structure includes a first portion aligned with the grooves.

公开(公告)号：US20210407963A1

公开(公告)日：2021-12-30

申请号：US16916098

申请日：2020-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Ting Lin ,  Ping-Kang Huang ,  Sao-Ling Chiu ,  Shang-Yun Hou

IPC: H01L25/065 ,  H01L23/04 ,  H01L23/31 ,  H01L23/36 ,  H01L23/16 ,  H01L21/56

Abstract: A package structure includes a semiconductor device, a circuit substrate and a heat dissipating lid. The semiconductor device includes a semiconductor die. The circuit substrate is bonded to and electrically coupled to the semiconductor device. The heat dissipating lid is bonded to the circuit substrate and thermally coupled to the semiconductor device, where the semiconductor device is located in a space confined by the heat dissipating lid and the circuit substrate. The heat dissipating lid includes a cover portion and a flange portion bonded to a periphery of the cover portion. The cover portion has a first surface and a second surface opposite to the first surface, where the cover portion includes a recess therein, the recess has an opening at the second surface, and a thickness of the recess is less than a thickness of the cover portion, where the recess is part of the space.

公开(公告)号：US20210366814A1

公开(公告)日：2021-11-25

申请号：US16881211

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shang-Yun Hou ,  Hsien-Pin Hu ,  Sao-Ling Chiu ,  Wen-Hsin Wei ,  Ping-Kang Huang ,  Chih-Ta Shen ,  Szu-Wei Lu ,  Ying-Ching Shih ,  Wen-Chih Chiou ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.