公开(公告)号：US09639336B2

公开(公告)日：2017-05-02

申请号：US13660986

申请日：2012-10-25

Applicant: NVIDIA Corporation

Inventor： Vinod Grover ,  Manjunath Kudlur ,  Michael Murphy

IPC: G06F9/44 ,  G06F9/45 ,  G06F9/50

CPC classification number: G06F8/443 ,  G06F8/41 ,  G06F8/433 ,  G06F8/4442 ,  G06F8/445 ,  G06F8/45 ,  G06F8/456 ,  G06F9/5066

Abstract: One embodiment of the present invention sets forth a technique for reducing the number of assembly instructions included in a computer program. The technique involves receiving a directed acyclic graph (DAG) that includes a plurality of nodes, where each node includes an assembly instruction of the computer program, hierarchically parsing the plurality of nodes to identify at least two assembly instructions that are vectorizable and can be replaced by a single vectorized assembly instruction, and replacing the at least two assembly instructions with the single vectorized assembly instruction.

公开(公告)号：US20170115970A1

公开(公告)日：2017-04-27

申请号：US14920295

申请日：2015-10-22

Applicant: Advanced Micro Devices, Inc.

Inventor： Prakash Sathyanath Raghavendra ,  Dibyendu Das ,  Arun Rangasamy

IPC: G06F9/45

CPC classification number: G06F8/433 ,  G06F8/4432 ,  G06F8/4434 ,  G06F8/4441 ,  G06F17/505 ,  G06F17/5054

Abstract: A compiler generates transfer functions for blocks of a program during compilation of the program. The transfer functions estimate bit widths of variables in the blocks based on numbers of bits needed to carry out at least one instruction in the blocks and whether the variables are live in the blocks. For example, a transfer function may return a number indicating how many bits of a variable are needed to execute a current instruction as a function of the number of bits of the variable used by the program in subsequent instructions. Numbers of bits to represent the variables in the compiled program based on the transfer functions.

公开(公告)号：US20170109149A1

公开(公告)日：2017-04-20

申请号：US15140665

申请日：2016-04-28

Applicant: International Business Machines Corporation

Inventor： Jaques Clapauch ,  Steven J. Perron

IPC: G06F9/45

CPC classification number: G06F8/443 ,  G06F8/433 ,  G06F8/4441

Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.

公开(公告)号：US20170109145A1

公开(公告)日：2017-04-20

申请号：US15064014

申请日：2016-03-08

Applicant: International Business Machines Corporation

Inventor： Iain A. Ireland ,  Allan H. Kielstra ,  Muntasir A. Mallick

IPC: G06F9/45

CPC classification number: H01L23/49838 ,  G06F8/433 ,  G06F8/443 ,  G06F9/30 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/81 ,  H01L2224/81192

Abstract: A computer-implemented method includes, in a code transformation system, identifying save-to-return code instructions, function call code instructions, comparison code instructions, and exceptional code instructions. The function call code instructions are associated with the save-to-return code instructions. The comparison code instructions are associated with the save-to-return code instructions. The exceptional code instructions are associated with the comparison code instructions. A predefined proximity range based on a predefined proximity value as well as a proximity eligibility indicator are determined. The proximity eligibility indicator denotes whether the save-to-return code instructions and the comparison code instructions are within the predefined proximity range. Responsive to the proximity eligibility indicator denoting the save-to-return code instructions and the comparison code instructions are within the predefined proximity range, one or more execution flow relationships between the function call code instructions and the exceptional code instructions are created. A corresponding computer program product and computer system are also disclosed.

公开(公告)号：US20170097823A1

公开(公告)日：2017-04-06

申请号：US14875345

申请日：2015-10-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Yi-Min Chee ,  Hao Chen ,  Ya Bin Dang ,  Shao Chun Li ,  Guang Tai Liang ,  Li Jun Mei

IPC: G06F9/44

CPC classification number: G06F8/73 ,  G06F8/433 ,  G06F8/71

Abstract: Method and systems for tagging code include building a code structure based description unit association model (CDAM) that associates code units with respective description units and organizes the code units in a hierarchical structure. The CDAM is filtered to remove un-meaningful description units through cross-validation between code units. Feature tags are generated based on a weighted sum of term frequencies in the description units of the CDAM to associate features with respective code units.

公开(公告)号：US20170090890A1

公开(公告)日：2017-03-30

申请号：US14871996

申请日：2015-09-30

Applicant: SEMMLE LIMITED

Inventor： Joshua George Hale

IPC: G06F9/45

CPC classification number: G06F8/22 ,  G06F3/0481 ,  G06F8/24 ,  G06F8/35 ,  G06F8/433 ,  G06F8/443 ,  G06F8/65 ,  G06F8/71 ,  G06F8/73 ,  G06F8/74 ,  G06F8/75 ,  G06F11/3604 ,  G06F11/3668 ,  G06F16/2237 ,  G06F16/2246 ,  G06F16/2379 ,  G06F16/245 ,  G06T11/206 ,  G06T2200/24 ,  H04L67/40

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computing virtual compositions. One of the methods includes receiving a request to compute a virtual disjunction over three or more tiered arrays. Respective ranges of contiguously set indexes in the arrays are repeatedly compared until the end of all of the arrays is reached, including, on each iteration, determining a smallest start index n0 among current ranges of the arrays, wherein the smallest start index n0 is the first set index in a range [n0,n1], determining whether any of other arrays have overlapping ranges that extend the range [n0,n1] in the virtual conjunction, updating n1 for each other array having an overlapping range that extends the current range, outputting the range [n0,n1] the updated value for n1, and determining a next range starting at or after n1+2 for each of the arrays.

公开(公告)号：US20170090889A1

公开(公告)日：2017-03-30

申请号：US15174693

申请日：2016-06-06

Applicant: SEMMLE LIMITED

Inventor： Joshua George Hale ,  Luke James Cartey ,  Geoffrey White

IPC: G06F9/45 ,  G06T11/20 ,  G06F3/0481

CPC classification number: G06F8/22 ,  G06F3/0481 ,  G06F8/24 ,  G06F8/35 ,  G06F8/433 ,  G06F8/443 ,  G06F8/65 ,  G06F8/71 ,  G06F8/73 ,  G06F8/74 ,  G06F8/75 ,  G06F11/3604 ,  G06F11/3668 ,  G06F17/30324 ,  G06F17/30327 ,  G06F17/30377 ,  G06F17/30424 ,  G06T11/206 ,  G06T2200/24 ,  H04L67/40

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generated aggregated dependencies between software elements in a code base. One of the methods includes processing selected software elements as represented by a raw dependency graph and a hierarchy graph to generate data representing an aggregated dependency graph, the aggregated dependency graph having nodes representing the selected software elements and aggregated dependencies between one or more of the selected software elements, wherein each aggregated dependency between a pair of the selected software elements represents that a first software element of the pair, or a descendant of the first software element according to the hierarchy graph, depends, according to the raw dependency graph, on a second software element of the pair or a descendant of the second software element according to the hierarchy graph. The data representing the aggregated dependency graph is provided in response to the request.

公开(公告)号：US20170090885A1

公开(公告)日：2017-03-30

申请号：US14869334

申请日：2015-09-29

Applicant: SEMMLE LIMITED

Inventor： Peter Cawley

IPC: G06F9/44 ,  G06F9/45

CPC classification number: G06F8/37 ,  G06F8/41 ,  G06F8/423 ,  G06F8/433 ,  G06F8/48 ,  G06F9/445

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for automatically determining configuration properties of a compiler. One of the methods includes determining that an executable of the newly created process is a compiler called by the build system to compile source code of a source code file. In response to the determining, a plurality of configuration properties of the compiler called by the build system are determined, the configuration properties including first properties of a plurality of built-in functions of the compiler, second properties of a plurality of built-in types of the compiler, or both. A compiler emulator is configured to emulate the behavior of the compiler called by the build system using the determined configuration properties. Access to the source code is provided to the compiler emulator configured using the determined configuration properties.

公开(公告)号：US20170068586A1

公开(公告)日：2017-03-09

申请号：US15357473

申请日：2016-11-21

Applicant: Purdue Research Foundation

Inventor： Yu Charlie Hu ,  Abhilash Jindal ,  Samuel Midkiff ,  Abhinav Pathak

IPC: G06F11/07 ,  G06F9/45 ,  G06F11/36 ,  G06F1/32 ,  G06F1/28

CPC classification number: G06F11/0742 ,  G06F1/28 ,  G06F1/3296 ,  G06F8/20 ,  G06F8/433 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/0793 ,  G06F11/3466 ,  G06F11/3604 ,  G06F11/3608 ,  G06F11/3636 ,  G06F11/3664

Abstract: Embodiments of the present invention provide a system and methods for detecting power bugs. In one embodiment, a computer-implemented method for analyzing a computer code includes generating a control flow graph for at least a portion of the computer code at a processor. The method further includes identifying power bugs by traversing the control flow graph if the control flow graph exits without performing a function call to deactivate power to any component of a device configured to execute computer executable instructions based on the compute code after performing a function call to activate power.

Abstract translation: 本发明的实施例提供了一种用于检测功率错误的系统和方法。 在一个实施例中，用于分析计算机代码的计算机实现的方法包括在处理器处为所述计算机代码的至少一部分生成控制流程图。 该方法还包括：如果控制流程图在不执行功能调用的情况下退出控制流程图，则通过遍历控制流程图来识别功能错误，该功能调用在对执行功能调用之后基于计算机代码执行计算机可执行指令的设备的任何组件的任何组件停用功能 激活电源

公开(公告)号：US20170060550A1

公开(公告)日：2017-03-02

申请号：US14838402

申请日：2015-08-28

Applicant: International Business Machines Corporation

Inventor： Michael S. Fulton ,  Gary I. Mazo ,  Brian W. Svihovec

IPC: G06F9/45

CPC classification number: G06F8/433 ,  G06F8/20 ,  G06F8/41 ,  G06F8/60 ,  G06F8/71

Abstract: A computer-implemented method includes receiving a set of complete source instructions to process a source code entity, an incremental build part, and a set of file definitions. The method analyzes the set of complete source instructions. The method identifies, from the set of analyzed source instructions, a set of operations that reference the incremental build subset. The method repeats: (i) determining, for each operation, whether any additional files are affected by the operation, the additional files forming a set of affected files; (ii) creating a combined set of files, the combined set of files consisting of the set of affected files and the incremental build subset; and (iii) updating the set of operations to include those from the analyzed source instructions that reference the combined set of files; until no new files are added to the combined set of files. The method generates a set of incremental source instructions.

Abstract translation: 计算机实现的方法包括接收一组完整的源指令以处理源代码实体，增量构建部分和一组文件定义。 该方法分析了完整的源代码指令集。 该方法从分析的源指令集中识别引用增量构建子集的一组操作。 该方法重复：（i）为每个操作确定任何附加文件是否受到操作的影响，附加文件形成一组受影响的文件; （ii）创建一组组合的文件，由一组受影响的文件和增量构建子集组成的文件组合; 以及（iii）更新所述操作集合以包括来自分析的源指令的参考组合文件集合; 直到没有新的文件被添加到组合的文件集。 该方法生成一组增量源指令。