Method of fabricating silicon emitter with a low porosity heavily doped contact layer
    91.
    发明授权
    Method of fabricating silicon emitter with a low porosity heavily doped contact layer 失效
    制造具有低孔隙率重掺杂接触层的硅发射器的方法

    公开(公告)号:US06939728B2

    公开(公告)日:2005-09-06

    申请号:US10439642

    申请日:2003-05-15

    CPC classification number: H01J1/308 H01J9/022 Y10S438/96

    Abstract: A high emission electron emitter and a method of fabricating a high emission electron emitter are disclosed. A high emission electron emitter includes an electron injection layer, an active layer of high porosity porous silicon material in contact with the electron injection layer, a contact layer of low porosity porous silicon material in contact with the active layer and including an interface surface with a heavily doped region, and an optional top electrode in contact with the contact layer. The contact layer reduces contact resistance between the active layer and the top electrode and the heavily doped region reduces resistivity of the contact layer thereby increasing electron emission efficiency and stable electron emission from the top electrode. The electron injection layer is made from an electrically conductive material such as n+ semiconductor, n+ single crystal silicon, a metal, a silicide, or a nitride. The active layer and the contact layer are formed in a layer of silicon material that is deposited on the electron injection layer and then electrochemically anodized in a hydrofluoric acid solution. Prior to the anodization, the interface surface can be doped to form the heavily doped region. The layer of silicon material can be porous epitaxial silicon, porous polysilicon, porous amorphous silicon, and porous silicon carbide.

    Abstract translation: 公开了高发射电子发射体和制造高发射电子发射体的方法。 高发射电子发射体包括电子注入层,与电子注入层接触的高孔隙率多孔硅材料的有源层,与活性层接触的低孔隙率多孔硅材料的接触层, 重掺杂区域和与接触层接触的可选顶部电极。 接触层降低了有源层和顶部电极之间的接触电阻,并且重掺杂区域降低了接触层的电阻率,从而提高了电子发射效率和从顶部电极稳定的电子发射。 电子注入层由诸如n +半导体,n +单晶硅,金属,硅化物或氮化物的导电材料制成。 有源层和接触层形成在沉积在电子注入层上的硅材料层中,然后在氢氟酸溶液中电化学阳极氧化。 在阳极氧化之前,可以将界面表面掺杂以形成重掺杂区域。 硅材料层可以是多孔外延硅,多孔多晶硅,多孔非晶硅和多孔碳化硅。

    Planar electron emitter apparatus with improved emission area and method of manufacture

    公开(公告)号:US20050156500A1

    公开(公告)日:2005-07-21

    申请号:US11083680

    申请日:2005-03-16

    CPC classification number: B82Y10/00 G11B9/10 H01J1/308 H01J1/312

    Abstract: The field emission planar electron emitter device is disclosed that has an emitter electrode, an extractor electrode, and a planar emitter emission layer, electrically coupled to the emitter electrode and the extractor electrode. The planar electron emitter is configured to bias electron emission in a central region of the emission layer in preference to an outer region thereof. One structural example that provides this biasing is achieved by fabricating the planar emitter emission layer so that it has an outer perimeter that is thicker in depth than at an interior portion of the planar emitter emission layer, which reduces electron beam emission at the outer perimeter when an electric field is applied between the emitter electrode and the extractor electrode. The electric field draws emission electrons from the surface of the planar emitter emission layer towards the extractor electrode at a higher rate at the interior portion than at the outer perimeter. The planar electron emitter device further includes a focusing electrode electrically coupled to the planar electron emitter.

    Planar electron emitter apparatus with improved emission area and method of manufacture

    公开(公告)号:US06914374B2

    公开(公告)日:2005-07-05

    申请号:US10043376

    申请日:2002-01-09

    CPC classification number: B82Y10/00 G11B9/10 H01J1/308 H01J1/312

    Abstract: The field emission planar electron emitter device is disclosed that has an emitter electrode, an extractor electrode, and a planar emitter emission layer, electrically coupled to the emitter electrode and the extractor electrode. The planar electron emitter is configured to bias electron emission in a central region of the emission layer in preference to an outer region thereof. One structural example that provides this biasing is achieved by fabricating the planar emitter emission layer so that it has an outer perimeter that is thicker in depth than at an interior portion of the planar emitter emission layer, which reduces electron beam emission at the outer perimeter when an electric field is applied between the emitter electrode and the extractor electrode. The electric field draws emission electrons from the surface of the planar emitter emission layer towards the extractor electrode at a higher rate at the interior portion than at the outer perimeter. The planar electron emitter device further includes a focusing electrode electrically coupled to the planar electron emitter.

    Flat surface emitter for use in field emission display devices
    96.
    发明授权
    Flat surface emitter for use in field emission display devices 失效
    用于场发射显示装置的平面发射器

    公开(公告)号:US6011356A

    公开(公告)日:2000-01-04

    申请号:US70398

    申请日:1998-04-30

    CPC classification number: H01J1/308 H01J2201/319 H01J2329/00

    Abstract: For use in cathodoluminescent field emission display devices, a cathode emitter can comprise an inverted field effect transistor having a diamond film or other low effective work function material deposited onto the channel layer of the transistor, such that the diamond film provides a source of primary electron emissions. A variable voltage source is applied to the gate of the transistor creating an electric field that controls the conductivity of the channel layer, thereby activating or deactivating electron emissions from this cathode emitter structure. In addition, electron blocking junctions can be incorporated into the emitter structure to inhibit current flow through the device during a deactivated state. In a variation, the transistor of the cathode emitter has the diamond film being deposited onto an electrically conductive pad that is electrically connected to, and extending outwardly from, the transistor. Alternatively, a sideways laterally gated transistor structure can be used with the emitter surface being applied to the transistor's drain. A near mono-molecular oxide film of high secondary electron emission material can also be included on the emitter surface for enhanced electron emissions.

    Abstract translation: 为了用于阴极发光场发射显示装置,阴极发射器可以包括具有沉积在晶体管的沟道层上的金刚石膜或其它低有效功函数材料的反向场效应晶体管,使得金刚石膜提供初级电子源 排放。 可变电压源被施加到晶体管的栅极,产生控制沟道层的导电性的电场,从而激活或去激活来自该阴极发射极结构的电子发射。 此外,电子阻挡接头可以结合到发射极结构中,以在去激活状态期间阻止电流流过器件。 在一个变型中,阴极发射器的晶体管具有金刚石膜,该金刚石膜被沉积到与晶体管电连接并从晶体管向外延伸的导电焊盘上。 或者,可以使用侧向横向门控晶体管结构,其中发射极表面被施加到晶体管的漏极。 高二次电子发射材料的近单分子氧化膜也可以包括在发射体表面上以增强电子发射。

    Surface conduction emitters for use in field emission display devices
    97.
    发明授权
    Surface conduction emitters for use in field emission display devices 失效
    用于场发射显示装置的表面传导发射体

    公开(公告)号:US5945777A

    公开(公告)日:1999-08-31

    申请号:US70611

    申请日:1998-04-30

    CPC classification number: H01J1/308 H01J2329/00

    Abstract: For use in cathodoluminescent field emission display devices, a gated channel layer of an inverted field effect transistor functions as the electron emissive layer for a flat film surface conduction cathode emitter. In such emitters, electrons are emitted from the surface of a flat thin emissive film when an electric current is caused to flow through the film in parallel with the surface of the film. An electric field caused by a variable voltage source being applied to the gate of the transistor can control the conductivity of the channel layer, thereby controlling the level of electron emissions from the cathode emitter structure. In a variation, the field effect transistor is constructed with a two-tier structure that during operation is designed to keep conduction near the surface of the transistor. As a result, this device pushes electrons towards the exposed surface where they can then escape from the channel layer to bombard the cathodoluminescent phosphor anode. To ensure against unwanted anode currents, electron blocking junction elements can be incorporated on either side or both sides of the channel and positioned over a widened gate electrode, such that they are commonly gated along with the channel to respond to a single control voltage input to the gate electrode. Further, such emitter structures can incorporate a thin near mono-molecular film of a high secondary electron emission material on the surface of the electron emissive layer, to generally enhance the level of electron emissions from the emitter.

    Abstract translation: 为了用于阴极发光场发射显示装置,反向场效应晶体管的门控沟道层用作平坦膜表面传导阴极发射极的电子发射层。 在这样的发射体中,当使电流与薄膜的表面平行地流过薄膜时,从平坦的发光薄膜的表面发射电子。 由施加到晶体管的栅极的可变电压源引起的电场可以控制沟道层的导电性,从而控制来自阴极发射极结构的电子发射的水平。 在一个变型中,场效应晶体管被构造为具有两层结构,其在操作期间被设计成在晶体管的表面附近保持导通。 结果,该装置将电子推向暴露表面,然后它们可以从沟道层逸出,以轰击阴极发光磷光体阳极。 为了确保防止不需要的阳极电流,电子阻挡接合元件可以结合在通道的任一侧或两侧并且定位在加宽的栅电极上,使得它们通常与通道一起选通以响应单个控制电压输入 栅电极。 此外,这种发射极结构可以在电子发射层的表面上并入高二次电子发射材料的薄的近分子膜,从而通常增强从发射极发射的电子的水平。

    Method for making inversion mode diamond electron source
    98.
    发明授权
    Method for making inversion mode diamond electron source 失效
    制作反型金刚石电子源的方法

    公开(公告)号:US5631196A

    公开(公告)日:1997-05-20

    申请号:US385027

    申请日:1995-02-07

    CPC classification number: H01J1/308

    Abstract: An electron source including selectively impurity doped semiconductor diamond wherein regions of selectively impurity doped regions are inverted with respect to the charge carrier population to provide a conductive path traversed by electrons subsequently emitted into a free-space region from the electron emitter. An inversion mode electron emission device including a selectively impurity doped semiconductor diamond electron emitter, for emitting electrons; a control electrode; and an anode for collecting emitted electrons wherein operation of the device relies on the inducement of an inversion region to facilitate electron transit to an electron emitting surface of the electron emitter.

    Abstract translation: 包括选择性杂质掺杂的半导体金刚石的电子源,其中选择性杂质掺杂区域的区域相对于电荷载流子群反转,以提供随后从电子发射体发射到自由空间区域的电子穿过的导电路径。 一种反相模式电子发射装置,包括用于发射电子的选择性掺杂杂质的半导体金刚石电子发射体; 控制电极; 以及用于收集发射电子的阳极,其中器件的操作依赖于反转区域的诱导以促进电子转移到电子发射器的电子发射表面。

    Heterojunction step doped barrier cathode emitter
    99.
    发明授权
    Heterojunction step doped barrier cathode emitter 失效
    异质结掺杂势垒阴极发射极

    公开(公告)号:US5463275A

    公开(公告)日:1995-10-31

    申请号:US911581

    申请日:1992-07-10

    CPC classification number: H01J1/308

    Abstract: This invention discloses an emitter for a vacuum microelectronic device. The emitter includes a heterojunction step-doped barrier comprised of a first gallium arsenide region, an aluminum gallium arsenide region adjacent the first gallium arsenide region, and a second gallium arsenide region adjacent the aluminum gallium region and opposite to the first gallium arsenide region. The first gallium arsenide region includes a layer of heavily doped n-type gallium arsenide. The aluminum gallium arsenide region includes an intrinsic layer and a heavily doped p-type layer. The second gallium arsenide region includes a heavily doped p-type layer adjacent the aluminum gallium arsenide region, an intrinsic layer and a heavily doped n-type layer adjacent a vacuum region. In addition, a graded layer between the first gallium arsenide layer region and the aluminum gallium arsenide region is provided. Ohmic contacts are fabricated on the outer surfaces of the first gallium arsenide layer and the second gallium arsenide layer. An appropriate potential is applied across the ohmic contacts such that most of the electrons from the first gallium arsenide region have enough kinetic energy to transcend the vacuum barrier potential and be emitted into the vacuum region.

    Abstract translation: 本发明公开了一种用于真空微电子器件的发射器。 发射极包括由第一砷化镓区域,与第一砷化镓区域相邻的砷化镓砷化镓区域和与铝镓区域相邻并与第一砷化镓区域相对的第二砷化镓区域的异质结阶跃掺杂势垒。 第一砷化镓区域包括重掺杂的n型砷化镓的层。 砷化镓铝区域包括本征层和重掺杂的p型层。 第二砷化镓区域包括与砷化铝砷化镓区域相邻的重掺杂p型层,邻近真空区域的本征层和重掺杂的n型层。 此外,提供了在第一砷化镓层区域和砷化镓镓区域之间的渐变层。 在第一砷化镓层和第二砷化镓层的外表面上制造欧姆接触。 在欧姆接触之间施加适当的电势,使得来自第一砷化镓区域的大部分电子具有足够的动能来超越真空势垒电位并被发射到真空区域。

    Inversion mode diamond electron source
    100.
    发明授权
    Inversion mode diamond electron source 失效
    反转模式金刚石电子源

    公开(公告)号:US5430348A

    公开(公告)日:1995-07-04

    申请号:US276879

    申请日:1994-07-18

    CPC classification number: H01J1/308

    Abstract: An electron source including selectively impurity doped semiconductor diamond wherein regions of selectively impurity doped regions are inverted with respect to the charge carrier population to provide a conductive path traversed by electrons subsequently emitted into a free-space region from the electron emitter. An inversion mode electron emission device including a selectively impurity doped semiconductor diamond electron emitter, for emitting electrons; a control electrode; and an anode for collecting emitted electrons wherein operation of the device relies on the inducement of an inversion region to facilitate electron transit to an electron emitting surface of the electron emitter.

    Abstract translation: 包括选择性杂质掺杂的半导体金刚石的电子源,其中选择性杂质掺杂区域的区域相对于电荷载流子群反转,以提供随后从电子发射体发射到自由空间区域的电子穿过的导电路径。 一种反相模式电子发射装置,包括用于发射电子的选择性掺杂杂质的半导体金刚石电子发射体; 控制电极; 以及用于收集发射电子的阳极,其中器件的操作依赖于反转区域的诱导以促进电子转移到电子发射器的电子发射表面。

Patent Agency Ranking