公开(公告)号：US20240243712A1

公开(公告)日：2024-07-18

申请号：US18411748

申请日：2024-01-12

Applicant: STMicroelectronics (Alps) SAS

Inventor： Vratislav MICHAL ,  Samuel FOULON

IPC: H03F3/45 ,  H03F1/32

CPC classification number: H03F3/45183 ,  H03F1/3205 ,  H03F3/45744

Abstract: A differential pair circuit includes a first branch and a second branch having a common first node. Each of the first and second branches includes at least one transistor having a conduction node directly connected to the common first node. A third branch couples the common first node to a power supply node. The third branch includes a current source in series with a resistive element.

公开(公告)号：US20240231410A9

公开(公告)日：2024-07-11

申请号：US18379262

申请日：2023-10-12

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Julien GOULIER ,  Nicolas GOUX ,  Marc JOISSON

IPC: G05F3/26 ,  G05F1/46 ,  H03K17/18 ,  H03K17/22

CPC classification number: G05F3/262 ,  G05F1/468 ,  H03K17/18 ,  H03K17/22 ,  H03F3/45179

Abstract: An electronic circuit includes a reference voltage circuit and a circuit for checking the starting operation of the reference voltage circuit. The reference voltage circuit includes a first stack of a first transistor and second transistor receiving first and second control signals, respectively. The start check circuit includes a first elementary test circuit including a second stack of a third transistor and fourth transistor receiving the first and second control signals, respectively. An output of the first elementary test circuit delivers a first binary signal indicative of proper starting operation of the reference voltage circuit.

公开(公告)号：US12008244B2

公开(公告)日：2024-06-11

申请号：US17810093

申请日：2022-06-30

Applicant: STMicroelectronics (Alps) SAS

Inventor： Jawad Benhammadi

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0655 ,  G06F3/0679

Abstract: The present description concerns a method comprising: the loading, from a non-volatile memory of a circuit to a computation circuit, of a first security parameter of the circuit and of a first error-correcting code stored in association with the first security parameter; the verification, by the computation circuit, of the first security parameter and of the first error-correcting code to determine whether one or a plurality of the bits of the security parameter are erroneous; and if it is determined that two bits of the security parameter are erroneous, the loading of a default value of the first parameter into a register.

公开(公告)号：US20240171424A1

公开(公告)日：2024-05-23

申请号：US18509618

申请日：2023-11-15

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Application GmbH ,  STMicroelectronics (Alps) SAS

Inventor： Fred Rennig ,  Giovanni Luca Torrisi ,  Manuel Gaertner ,  Philippe Sirito-Olivier ,  Fritz Burkhardt ,  Aldo Occhipinti

IPC: H04L12/40

CPC classification number: H04L12/40006 ,  H04L2012/40215

Abstract: A vehicle communication network includes electronic control units arranged in a plurality of groups. The electronic control units pertaining to the same group are coupled to each other via a respective dedicated communication bus. A central controller is coupled to the plurality of local controllers. Electrical loads are coupled to one of the electronic control units. Each of the electronic control units is configured to decode the received CAN frame to produce the actuation signal for a respective electrical load in response to a CAN frame being received from the respective local controller and transmit a CAN wake-up frame to the respective local controller and encode the feedback signal into a CAN frame for transmission to the respective local controller in response to the feedback signal being received from the respective electrical load.

公开(公告)号：US11988776B2

公开(公告)日：2024-05-21

申请号：US18359477

申请日：2023-07-26

Applicant: STMicroelectronics (Alps) SAS

Inventor： Romain David ,  Xavier Branca

IPC: G01S7/484 ,  G01S17/10 ,  H01S5/042 ,  H01S5/062

CPC classification number: G01S7/484 ,  G01S17/10 ,  H01S5/0428 ,  H01S5/062

Abstract: The present disclosure relates to a driver circuit for an optical light emitter of a ranging device, the driver circuit comprising: an inductor having a first of its nodes coupled to a current driver; a first branch comprising a first switch coupled between the second node of the inductor and a first supply voltage rail; a second branch for conducting a current through the optical light emitter, the second branch being coupled between the second node of the inductor and the first supply voltage rail; and a current sensor configured to detect the current passing through the inductor and to provide a feedback signal to the current driver.

公开(公告)号：US11907156B2

公开(公告)日：2024-02-20

申请号：US17457553

申请日：2021-12-03

Applicant: STMicroelectronics France ,  STMicroelectronics (Alps) SAS

Inventor： Michael Soulie ,  Thomas Martin

IPC: G06F15/78 ,  G06F1/08 ,  G06F1/14

CPC classification number: G06F15/7807 ,  G06F1/08 ,  G06F1/14

Abstract: According to one aspect, provision is made of a system-on-chip comprising a master device, a slave device, a clock configured to clock the operation of the slave device, a clock controller configured to activate or deactivate the clock and/or a power-on controller configured to power on/off the slave device, a control system configured to detect that the clock is deactivated and/or that the slave device is powered off when the master device emits an access request to the slave device, the master device being configured for activating the clock when the control system detects that this clock is deactivated and/or powering on the slave device when the control system detects that the slave device is powered off, then emitting a new access request to the slave device.

公开(公告)号：US11876732B2

公开(公告)日：2024-01-16

申请号：US17100505

申请日：2020-11-20

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Daniel Olson ,  Loic Pallardy ,  Nicolas Anquet

IPC: H04L41/0803 ,  H04L49/109 ,  G06F21/85

CPC classification number: H04L49/109 ,  G06F21/85 ,  H04L41/0803

Abstract: System on a chip, comprising several master pieces of equipment, several slave resources, an interconnection circuit coupled between the master pieces of equipment and the slave resources and capable of routing transactions between master pieces of equipment and slave resources. A first particular slave resource cooperates with an element of the system on a chip, for example a clock signal generator, and the element has the same access rights as those of the corresponding first particular slave resource.

公开(公告)号：US20230385149A1

公开(公告)日：2023-11-30

申请号：US18313686

申请日：2023-05-08

Applicant: STMicroelectronics (Alps) SAS

Inventor： Jawad Benhammadi

IPC: G06F11/10 ,  G06F12/02 ,  G06F13/16

CPC classification number: G06F11/1068 ,  G06F12/0246 ,  G06F13/1668

Abstract: In accordance with an embodiment, a method includes: performing a first write operation comprising writing a first data packet to a first portion of a first line of a flash memory; and performing a second write operation comprising writing a second data packet to a second portion of the first line of the flash memory, wherein the first line comprises the first data packet and the second data packet after performing the first write operation and the second write operation.

公开(公告)号：US20230361528A1

公开(公告)日：2023-11-09

申请号：US18193190

申请日：2023-03-30

Applicant: STMicroelectronics (Alps) SAS

Inventor： Xavier Branca

IPC: H01S5/062 ,  H01S5/00 ,  H01S5/06 ,  G01S7/484 ,  G01S17/10

CPC classification number: H01S5/062 ,  H01S5/0014 ,  H01S5/0617 ,  G01S7/484 ,  G01S17/10

Abstract: In according with an embodiment, a method for power supplying a laser diode includes: generating a power supply current injected directly into the laser diode; generating a power supply voltage biasing terminals of the laser diode; measuring a temperature in a vicinity of the laser diode; and controlling the power supply current at an adjusted intensity according to the measured temperature or controlling the power supply voltage at an adjusted level according to the measured temperature.

公开(公告)号：US20230327469A1

公开(公告)日：2023-10-12

申请号：US18335690

申请日：2023-06-15

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Alexandre Pons ,  Jean Camiolo ,  Meriem Mersel

IPC: H02J7/00

CPC classification number: H02J7/00712 ,  H02J7/007192 ,  H02J2207/20 ,  H02J2207/30

Abstract: An embodiment of the present disclosure relates to a power supply interface comprising: a converter delivering a first DC voltage; a resistor connected between the converter and an output terminal of the interface delivering a second DC voltage; a first circuit delivering a second signal representative of a difference between the second DC voltage and a voltage threshold when a first signal is in a first state, and at a default value otherwise; a second circuit delivering a third signal representative of a value of a current in first resistor multiplied by a gain of the third circuit, and modifying the gain based on the second signal; and a third circuit configured to deliver a signal for controlling the converter based at least on the third signal.