-
公开(公告)号：US11526999B2
公开(公告)日：2022-12-13
申请号：US16914007
申请日：2020-06-26
Applicant: Seagate Technology LLC
Inventor： Naman Sharma , Yu Qiang , Hock Soon Lim , Saravanan Nagarajan
Abstract: Technology disclosed herein provides an object tracking multi-camera system including a plurality of cameras to capture images of one or more objects and one or more pattern recognition modules, each of the pattern recognition modules configured to identify an object in a video frame using pattern recognition and assigning a tracking number to the identified object, collect a plurality of object frames related to the identified object and associating the plurality of object frames to the assigned tracking number, compare a newly obtained object frame with the plurality of object frames related to the identified object to determine if the newly obtained object frame is related to the identified object, and in response to the comparison determine that facial recognition does not need to be performed on the newly obtained object frame.
-
公开(公告)号：US20220391211A1
公开(公告)日：2022-12-08
申请号：US17819605
申请日：2022-08-12
Applicant: Seagate Technology LLC
Inventor： Marc Tim JONES
Abstract: The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command.
-
公开(公告)号：US11522842B2
公开(公告)日：2022-12-06
申请号：US16719333
申请日：2019-12-18
Applicant: Seagate Technology LLC
Inventor： Nyuk Fah Alice Lee
Abstract: Apparatus and method for device and data authentication in a computer network, such as but not limited to an IoT (Internet of Things) network. In some embodiments, a trust hub device is coupled to an interconnectivity device. The trust hub device includes a controller and non-volatile memory (NVM), and may be a network capable data storage device. The interconnectivity device is configured as an Internet of Things (IoT) or Operational Technology (OT) device, and includes a controller and a sensor. Data from the sensor are transferred from the interconnectivity device to the trust hub device. The trust hub device proceeds to attest a provenance of the data from the sensor to a remote entity associated with the interconnectivity device. The trust hub device includes a firewall to the external network, establishes a root of trust for the local interconnectivity device, and performs enrollment and signing services for the interconnectivity device.
-
公开(公告)号：US20220375497A1
公开(公告)日：2022-11-24
申请号：US16861027
申请日：2020-04-28
Applicant: Seagate Technology LLC
Inventor： Xiong Liu , Quan LI , Li Hong ZHANG
Abstract: A storage device includes a controller that determines a degree of data degradation for a data track targeted by a pending read command and sets a head/media clearance parameter for execution of the read command based on the determined degree of data degradation for the data track, the head/media clearance parameter providing for a greater head-media separation when the determined level of degradation is lower than when the determined level of degradation is higher.
-
公开(公告)号：US20220366937A1
公开(公告)日：2022-11-17
申请号：US17684047
申请日：2022-03-01
Applicant: Seagate Technology LLC
IPC: G11B20/10
Abstract: The technology disclosed herein pertains to a system and method for managing off-track retry. An implementation of a method of determining offset direction for read off-track retry includes storing analog to digital converter (ADC) values of data read from a data sector by a data reader in a read channel buffer, calculating an indicator value of the distribution of the ADC values, determining an amount of offset for the data reader based on the indicator value, and moving the data reader by the amount of offset before performing a read retry operation.
-
Patent Agency Ranking
公开(公告)号：US20220358053A1
公开(公告)日：2022-11-10
申请号：US17308882
申请日：2021-05-05
Applicant: Seagate Technology LLC
Inventor： Riyan Alex MENDONSA , Yasaman KESHTKARJAHROMI , Josip RELOTA , Vipin Singh SEHRAWAT
Abstract: In at least one implementation, technology disclosed herein provides a method including generating a plurality of shares of an encryption key such that a combination of shares having a cardinality above a threshold cardinality is sufficient to retrieve data encrypted with the encryption key, distributing the plurality of shares among a plurality of devices, the plurality of devices including one or more disc drive cartridges and one or more printed circuit board assemblies (PCBAs) configured to host one or more of the disc drive cartridges, receiving one or more of the plurality of shares from the plurality of devices, and in response to determining that cardinality of the received one or more of the plurality of shares is above the threshold cardinality, retrieving the data encrypted with the key.
-
公开(公告)号：US20220351749A1
公开(公告)日：2022-11-03
申请号：US17242518
申请日：2021-04-28
Applicant: Seagate Technology LLC
Inventor： Michael Yi Zhao Yao , XiaoJin Wu , Bo Shi , May Choo Pang
Abstract: The present disclosure relates to disk separator plates that include a coating to increase the water contact angle of the exterior surface of the disk separator plate so as to decrease its wettability. The present disclosure also involves hard disk drives that include such a disk separator plate and related methods of forming such a coating.
-
公开(公告)号：US20220350604A1
公开(公告)日：2022-11-03
申请号：US17245286
申请日：2021-04-30
Applicant: Seagate Technology LLC
Inventor： Marc Tim JONES
IPC: G06F9/30 , G06F9/50 , G06F13/362
Abstract: The technology disclosed herein provides a method including determining one or more dedicated computations storage programs (CSPs) used in a target market for a computational storage device, storing the dedicated CSPs in one or more pre-programmed computing instruction set (CIS) slots in the computational storage device, translating one or more instructions of the dedicated CSPs for processing using a native processor, loading one or more instructions of programmable CSPs to a CSP processor implemented within an application specific integrated circuit (ASIC) of the computational storage device, and processing the one or more instructions of the programmable CSPs using the CSP processor.
-
公开(公告)号：US11481342B2
公开(公告)日：2022-10-25
申请号：US16451864
申请日：2019-06-25
Applicant: Seagate Technology LLC
Inventor： Robert Wayne Moss , Michael Shaw , Thomas V. Spencer , Yalan Liu , Sarvani Reddy Kolli
Abstract: A data storage system can organize a semiconductor memory into a first data set and a second data set with a first queue populated with a first data access request from a host. An assignment of an arbitration weight to the first queue with an arbitration circuit corresponds with the first queue being skipped during a deterministic window based on the arbitration weight.
-
公开(公告)号：US20220328086A1
公开(公告)日：2022-10-13
申请号：US17719637
申请日：2022-04-13
Applicant: Seagate Technology LLC
Inventor： Jon D. Trantham , Praveen Viraraghavan , John W. Dykes , Ian J. Gilbert , Sangita Shreedharan Kalarickal , Matthew J. Totin , Mohamad El-Batal , Darshana H. Mehta
IPC: G11C11/22 , H01L27/1159 , H01L27/11597
Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.
-
-
-
-
-
-
-
-
-
Search Results
6059
records
(took 0.036 seconds)
