公开(公告)号：US20140224645A1

公开(公告)日：2014-08-14

申请号：US14254155

申请日：2014-04-16

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Dipankar Pramanik ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

IPC: H01L45/00

CPC classification number: C23C14/345 ,  C23C14/0042 ,  C23C14/0641 ,  C23C14/083 ,  C23C14/225 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 Ωcm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.

Abstract translation: 公开了一种非易失性存储元件，其包括第一电极，具有双稳态电阻的近化学计量的金属氧化物存储层和与近化学计量的金属氧化物存储层接触的第二电极。 至少一个电极是包含亚化学计量的过渡金属氮化物或氧氮化物的电阻电极，并且电阻率在0.1和10Ω之间。 电阻电极提供嵌入式限流电阻器的功能，并且还用作用于设置和复位金属氧化物层的电阻状态的氧空位的源极和吸收器。 还公开了用于第二电极的新颖制造方法。

公开(公告)号：US08796103B2

公开(公告)日：2014-08-05

申请号：US13721476

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Mihir Tendulkar ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L21/16

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1633

Abstract: Provided are methods of forming nonvolatile memory elements including resistance switching layers. A method involves diffusing oxygen from a precursor layer to one or more reactive electrodes by annealing. At least one electrode in a memory element is reactive, while another may be inert. The precursor layer is converted into a resistance switching layer as a result of this diffusion. The precursor layer may initially include a stoichiometric oxide that generally does not exhibit resistance switching characteristics until oxygen vacancies are created. Metals forming such oxides may be more electronegative than metals forming a reactive electrode. The reactive electrode may have substantially no oxygen at least prior to annealing. Annealing may be performed at 250-400° C. in the presence of hydrogen. These methods simplify process control and may be used to form nonvolatile memory elements including resistance switching layers less than 20 Angstroms thick.

Abstract translation: 提供了形成包括电阻切换层的非易失性存储元件的方法。 一种方法包括通过退火将氧从前体层扩散到一个或多个反应电极。 存储元件中的至少一个电极是反应性的，而另一个电极可能是惰性的。 作为该扩散的结果，前体层被转换成电阻切换层。 前体层可以最初包括化学计量的氧化物，其通常在氧空位产生之前不表现出电阻转换特性。 形成这种氧化物的金属可能比形成反应性电极的金属更具电负性。 至少在退火之前，反应电极可以基本上不含氧。 在氢气存在下，可以在250-400℃下进行退火。 这些方法简化了过程控制，并且可以用于形成包括小于20埃厚的电阻开关层的非易失性存储元件。

公开(公告)号：US20140175364A1

公开(公告)日：2014-06-26

申请号：US13722155

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1641

Abstract: Provided are radiation enhanced resistive switching layers, resistive random access memory (ReRAM) cells including these layers, as well as methods of forming these layers and cells. Radiation creates defects in resistive switching materials that allow forming and breaking conductive paths in these materials thereby improving their resistive switching characteristics. For example, ionizing radiation may break chemical bonds in various materials used for such a layer, while non-ionizing radiation may form electronic traps. Radiation power, dozing, and other processing characteristics can be controlled to generate a distribution of defects within the resistive switching layer. For example, an uneven distribution of defects through the thickness of a layer may help with lowering switching voltages and/or currents. Radiation may be performed before or after thermal annealing, which may be used to control distribution of radiation created defects and other types of defects in resistive switching layers.

Abstract translation: 提供了辐射增强的电阻式开关层，包括这些层的电阻随机存取存储器（ReRAM）单元，以及形成这些层和单元的方法。 辐射在电阻开关材料中产生缺陷，允许在这些材料中形成和断开导电路径，从而提高其电阻开关特性。 例如，电离辐射可以破坏用于这种层的各种材料中的化学键，而非电离辐射可以形成电子陷阱。 可以控制辐射功率，打盹等处理特性，以产生电阻式开关层内的缺陷分布。 例如，通过层的厚度的缺陷的不均匀分布可能有助于降低开关电压和/或电流。 可以在热退火之前或之后进行辐射，其可以用于控制电阻开关层中辐射产生的缺陷和其他类型的缺陷的分布。

公开(公告)号：US20140175360A1

公开(公告)日：2014-06-26

申请号：US13721358

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Mihir Tendulkar ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells having bi-layered metal oxide structures. The layers of a bi-layered structure may have different compositions and thicknesses. Specifically, one layer may be thinner than the other layer, sometimes as much as 5 to 20 times thinner. The thinner layer may be less than 30 Angstroms thick or even less than 10 Angstroms thick. The thinner layer is generally more oxygen rich than the thicker layer. Oxygen deficiency of the thinner layer may be less than 5 atomic percent or even less than 2 atomic percent. In some embodiments, a highest oxidation state metal oxide may be used to form a thinner layer. The thinner layer typically directly interfaces with one of the electrodes, such as an electrode made from doped polysilicon. Combining these specifically configured layers into the bi-layered structure allows improving forming and operating characteristics of ReRAM cells.

Abstract translation: 提供了具有双层金属氧化物结构的电阻随机存取存储器（ReRAM）单元。 双层结构的层可以具有不同的组成和厚度。 具体地说，一层可以比另一层薄一些，有时可以减薄5至20倍。 较薄的层可以小于30埃厚或甚至小于10埃厚。 较薄的层通常比较厚的层富氧。 较薄层的缺氧可能小于5原子％或甚至小于2原子％。 在一些实施方案中，可以使用最高氧化态金属氧化物来形成较薄的层。 较薄的层通常直接与一个电极（例如由掺杂多晶硅制成的电极）接合。 将这些特定配置的层组合成双层结构允许改善ReRAM单元的成形和操作特性。

公开(公告)号：US20140175356A1

公开(公告)日：2014-06-26

申请号：US13721658

申请日：2012-12-20

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/1293 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells including resistive switching layers and thermally isolating structures for limiting heat dissipation from the switching layers during operation. Thermally isolating structures may be positioned within a stack or adjacent to the stack. For example, a stack may include one or two thermally isolating structures. A thermally isolating structure may directly interface with a switching layer or may be separated by, for example, an electrode. Thermally isolating structures may be formed from materials having a thermal conductivity of less than 1 W/m*K, such as porous silica and mesoporous titanium oxide. A thermally isolating structure positioned in series with a switching layer generally has a resistance less than the low resistance state of the switching layer. A thermally isolating structure positioned adjacent to a switching layer may have a resistance greater than the high resistance state of the switching layer.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元，其包括电阻开关层和用于在操作期间限制来自开关层的散热的热隔离结构。 热隔离结构可以位于堆叠内或邻近堆叠。 例如，堆叠可以包括一个或两个热隔离结构。 热隔离结构可以直接与开关层接口或者可以通过例如电极分离。 热分离结构可以由导热率小于1W / m×K的材料形成，例如多孔二氧化硅和中孔氧化钛。 与开关层串联设置的隔热结构通常具有小于开关层的低电阻状态的电阻。 位于与开关层相邻的隔热结构可具有大于开关层的高电阻状态的电阻。

公开(公告)号：US20140154859A1

公开(公告)日：2014-06-05

申请号：US13705516

申请日：2012-12-05

Applicant: INTERMOLECULAR INC.

Inventor： Vidyut Gopal ,  Tony P. Chiang ,  Imran Hashim ,  Randall J. Higuchi ,  Robert A. Huertas ,  Hieu Pham ,  Yun Wang

IPC: H01L49/02

CPC classification number: H01L22/34 ,  H01L45/08 ,  H01L45/145

Abstract: Provided are methods for processing different materials on the same substrate for high throughput screening of multiple ReRAM materials. A substrate may be divided into multiple site isolated regions, each region including one or more base structures operable as bottom electrodes of ReRAM cells. Different test samples may be formed over these base structures in a combinatorial manner. Specifically, each site isolated region may receive a test sample that has a different characteristic than at least one other sample provided in another region. The test samples may have different compositions and/or thicknesses or be deposited using different techniques. These different samples are then etched in the same operation to form portions of the samples. Each portion is substantially larger than the corresponding base structure and fully covers this base structure to protect the interface between the base structure and the portion during etching.

Abstract translation: 提供了在同一基板上处理不同材料的方法，用于多个ReRAM材料的高通量筛选。 衬底可以被分成多个位置隔离区域，每个区域包括可操作为ReRAM单元的底部电极的一个或多个基底结构。 可以以组合的方式在这些基础结构上形成不同的测试样品。 具体地说，每个位置隔离区域可以接收具有与另一区域中提供的至少一个其他样品不同的特性的测试样品。 测试样品可以具有不同的组成和/或厚度或使用不同的技术沉积。 然后在相同的操作中蚀刻这些不同的样品以形成样品的一部分。 每个部分基本上大于对应的基部结构，并且完全覆盖该基部结构以在蚀刻期间保护基部结构和该部分之间的界面。

公开(公告)号：US20140134794A1

公开(公告)日：2014-05-15

申请号：US14156762

申请日：2014-01-16

Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/065 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625

Abstract: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

Abstract translation: 本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。 通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。 在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成 器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

公开(公告)号：US08704203B2

公开(公告)日：2014-04-22

申请号：US13971467

申请日：2013-08-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

IPC: H01L29/02

CPC classification number: H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

Abstract translation: 本发明的实施例包括非易失性存储器元件和包括非易失性存储元件的存储器件。 还公开了形成非易失性存储元件的方法。 非易失性存储元件包括第一电极层，第二电极层和设置在第一和第二电极层之间的多个氧化物层。 氧化物层中的一个具有线性电阻和亚化学计量组成，另一个氧化物层具有双稳态电阻和近化学计量组成。 优选地，两个氧化物层厚度的总和在约和之间，并且具有双稳态电阻的氧化物层具有在总厚度的约25％至约75％之间的厚度。 在一个实施例中，氧化物层在具有受控的氩气和氧气的气氛中使用反应溅射形成。

公开(公告)号：US20140071435A1

公开(公告)日：2014-03-13

申请号：US14077545

申请日：2013-11-12

Applicant: Intermolecular, Inc.

Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

IPC: G01R31/26 ,  G01N21/55

CPC classification number: G01R31/26 ,  G01N21/55 ,  G01R31/2607 ,  H02S50/10

Abstract: Simultaneous measurement of an internal quantum efficiency and an external quantum efficiency of a solar cell using an emitter that emits light; a three-way beam splitter that splits the light into solar cell light and reference light, wherein the solar cell light strikes the solar cell; a reference detector that detects the reference light; a reflectance detector that detects reflectance light, wherein the reflectance light comprises a portion of the solar cell light reflected off the solar cell; a source meter operatively coupled to the solar cell; a multiplexer operatively coupled to the solar cell, the reference detector, and the reflectance detector; and a computing device that simultaneously computes the internal quantum efficiency and the external quantum efficiency of the solar cell.

Abstract translation: 使用发射光的同时测量太阳能电池的内部量子效率和外部量子效率; 三光束分离器，其将光分解成太阳能电池光和参考光，其中太阳能电池光照射到太阳能电池; 检测参考光的参考检测器; 反射光检测器，其检测反射光，其中所述反射光包括从太阳能电池反射的太阳能电池光的一部分; 可操作地耦合到太阳能电池的源计量器; 可操作地耦合到太阳能电池，参考检测器和反射检测器的多路复用器; 以及同时计算太阳能电池的内部量子效率和外部量子效率的计算装置。

公开(公告)号：US20140038380A1

公开(公告)日：2014-02-06

申请号：US14017942

申请日：2013-09-04

Applicant: Kabushiki Kaisha Toshiba ,  Intermolecular Inc.

Inventor： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Dipankar Pramanik ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

IPC: H01L45/00

CPC classification number: C23C14/345 ,  C23C14/0042 ,  C23C14/0641 ,  C23C14/083 ,  C23C14/225 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 Ωcm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.

Abstract translation: 公开了一种非易失性存储元件，其包括第一电极，具有双稳态电阻的近化学计量的金属氧化物存储层和与近化学计量的金属氧化物存储层接触的第二电极。 至少一个电极是包含亚化学计量的过渡金属氮化物或氮氧化物的电阻电极，并且具有0.1至10Ωm的电阻率。 电阻电极提供嵌入式限流电阻器的功能，并且还用作用于设置和复位金属氧化物层的电阻状态的氧空位的源极和吸收器。 还公开了用于第二电极的新颖制造方法。