公开(公告)号：US20110076790A1

公开(公告)日：2011-03-31

申请号：US12992073

申请日：2009-05-11

申请人： Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

发明人： Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

IPC分类号： H01L21/66

CPC分类号： H01L29/7869 ,  H01L29/66969

摘要： A method for controlling the threshold voltage of a semiconductor element having at least a semiconductor as a component is characterized in including a process to measure one of a threshold voltage and a characteristic value serving as an index for the threshold voltage; a process to determine one of the irradiation intensity, irradiation time, and wavelength of the light for irradiating the semiconductor based on one of the measured threshold voltage and the measured characteristic value serving as the index for the threshold voltage; and a process to irradiate light whose one of the irradiation intensity, irradiation time, and wavelength has been determined onto the semiconductor; wherein the light irradiating the semiconductor is a light having a longer wavelength than the wavelength of the absorption edge of the semiconductor, and the threshold voltage is changed by the irradiation of the light.

摘要翻译： 用于控制具有至少半导体作为分量的半导体元件的阈值电压的方法的特征在于包括测量作为阈值电压的指标的阈值电压和特征值之一的处理; 基于所测量的阈值电压和作为阈值电压的指标的测量特征值之一来确定用于照射半导体的光的照射强度，照射时间和波长之一的处理; 以及将照射强度，照射时间和波长中的一个已经确定到半导体上的光照射的过程; 其中照射半导体的光是比半导体的吸收边缘的波长长的波长的光，并且通过光的照射来改变阈值电压。

公开(公告)号：US20110065216A1

公开(公告)日：2011-03-17

申请号：US12992070

申请日：2009-05-07

申请人： Nobuyuki Kaji ,  Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

发明人： Nobuyuki Kaji ,  Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

IPC分类号： H01L21/66 ,  G21G5/00

CPC分类号： H01L29/7869 ,  H01L22/14 ,  H01L29/66969

摘要： A method for manufacturing a semiconductor device or apparatus having at least a semiconductor as a component, characterized by including irradiating the semiconductor with light having a longer wavelength than the absorption edge wavelength of the semiconductor to change the threshold voltage of the semiconductor device or apparatus, and checking the threshold voltage of the semiconductor device or apparatus, after or during irradiation with the light, to determine whether the threshold voltage is in a predetermined range, during manufacturing the semiconductor device or apparatus.

摘要翻译： 一种半导体器件或装置的制造方法，其至少具有半导体作为部件，其特征在于，包括用比所述半导体的吸收边缘波长长的波长的光照射所述半导体，以改变所述半导体器件或装置的阈值电压， 以及在制造所述半导体器件或装置期间，在所述光照射之后或期间，检查所述半导体器件或装置的阈值电压，以确定所述阈值电压是否在预定范围内。

公开(公告)号：US20100065837A1

公开(公告)日：2010-03-18

申请号：US12515267

申请日：2007-11-29

申请人： Hideyuki Omura ,  Ryo Hayashi ,  Nobuyuki Kaji ,  Hisato Yabuta

发明人： Hideyuki Omura ,  Ryo Hayashi ,  Nobuyuki Kaji ,  Hisato Yabuta

IPC分类号： H01L29/786 ,  H01L21/34 ,  H01L33/00 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor is manufactured by forming a gate electrode on a substrate, forming a first insulating film on the gate electrode, forming an oxide semiconductor layer on the first insulating film with an amorphous oxide, patterning the first insulating film, patterning the oxide semiconductor layer, forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere, patterning the second insulating film to expose a pair of contact regions, forming an electrode layer on the pair of contact regions, and patterning the electrode layer to for a source electrode and a drain electrode.

摘要翻译： 通过在基板上形成栅电极，在栅电极上形成第一绝缘膜，在非晶氧化物上在第一绝缘膜上形成氧化物半导体层，形成第一绝缘膜，图案化氧化物半导体，制造薄膜晶体管 层，在含氧化气体的气氛中在所述氧化物半导体层上形成第二绝缘膜，图案化所述第二绝缘膜以露出一对接触区域，在所述一对接触区域上形成电极层，以及对所述电极层进行构图 用于源电极和漏电极。

公开(公告)号：US20100051947A1

公开(公告)日：2010-03-04

申请号：US12522371

申请日：2008-02-02

申请人： Hisato Yabuta ,  Nobuyuki Kaji ,  Ryo Hayashi

发明人： Hisato Yabuta ,  Nobuyuki Kaji ,  Ryo Hayashi

IPC分类号： H01L29/786 ,  H01B3/00

CPC分类号： H01L29/51 ,  H01L21/28194 ,  H01L29/4908 ,  H01L29/78609 ,  H01L29/7869

摘要： An amorphous insulator film is provided which is composed of silicon (Si) oxide, in which the amorphous insulator film includes Ar and an amount of Ar included therein is equal to or larger than 3 at. % in terms of atomic ratio with respect to Si.

摘要翻译： 提供由非晶绝缘体膜包括Ar和其中包含的Ar的量等于或大于3at的氧化硅（Si）组成的非晶绝缘体膜。 相对于Si的原子比为％。

公开(公告)号：US20080067508A1

公开(公告)日：2008-03-20

申请号：US11851764

申请日：2007-09-07

申请人： Ayanori Endo ,  Ryo Hayashi ,  Tatsuya Iwasaki

发明人： Ayanori Endo ,  Ryo Hayashi ,  Tatsuya Iwasaki

IPC分类号： H01L29/22 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L21/02422 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/265 ,  H01L21/268 ,  H01L21/3003 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

摘要： A method for manufacturing a field-effect transistor includes the steps of forming a source electrode and a drain electrode each containing hydrogen or deuterium; forming an oxide semiconductor layer in which the electrical resistance is decreased if hydrogen or deuterium is added; and, causing hydrogen or deuterium to diffuse from the source electrode and the drain electrode to the oxide semiconductor layer.

摘要翻译： 制造场效应晶体管的方法包括以下步骤：形成各自含有氢或氘的源极和漏极; 形成氧化物半导体层，其中如果加入氢或氘，则电阻降低; 并且使氢或氘从源电极和漏电极扩散到氧化物半导体层。

公开(公告)号：US07282132B2

公开(公告)日：2007-10-16

申请号：US10805323

申请日：2004-03-22

申请人： Masumitsu Iwata ,  Noboru Toyama ,  Ryo Hayashi ,  Yuichi Sonoda ,  Tomonori Nishimoto ,  Takaharu Kondo ,  Satoru Yamada ,  Yusuke Miyamoto

发明人： Masumitsu Iwata ,  Noboru Toyama ,  Ryo Hayashi ,  Yuichi Sonoda ,  Tomonori Nishimoto ,  Takaharu Kondo ,  Satoru Yamada ,  Yusuke Miyamoto

IPC分类号： C25D5/50

CPC分类号： H01L31/1884 ,  C25D9/04 ,  H01L31/056 ,  H01L31/1864 ,  Y02E10/52 ,  Y02P70/521

摘要： A film of zinc oxide electrochemically deposited from an aqueous solution is subjected to heat treatment at a temperature equal to or higher than 150° C. and equal to or lower than 400° C. in a nitrogen or inert gas atmosphere that contains oxygen, thereby obtaining a zinc oxide film that is low in electric resistance without impairing the light transmittance of the zinc oxide film.

摘要翻译： 在含有氧的氮气或惰性气体气氛中，将从水溶液电化学沉积的氧化锌薄膜在等于或高于150℃等于或低于400℃的温度下进行热处理，由此 获得电阻低而不损害氧化锌膜的透光率的氧化锌膜。

公开(公告)号：US5720826A

公开(公告)日：1998-02-24

申请号：US657066

申请日：1996-05-29

申请人： Ryo Hayashi ,  Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Jinsho Matsuyama ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Takahiro Yajima

发明人： Ryo Hayashi ,  Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Jinsho Matsuyama ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Takahiro Yajima

IPC分类号： H01L31/04 ,  H01L31/0392 ,  H01L31/075 ,  H01L31/20

CPC分类号： H01L31/076 ,  H01L31/03921 ,  H01L31/202 ,  H01L31/204 ,  H01L31/206 ,  Y02E10/548 ,  Y02P70/521

摘要： Provided are a photovoltaic element suitable for practical use, low in cost, high in reliability, and high in photoelectric conversion efficiency, and a fabrication process thereof. In the photovoltaic element having stacked layers of non-single-crystal semiconductors, at least an i-type semiconductor layer and a second conductivity type semiconductor layer are stacked on a first conductivity type semiconductor layer, and the second conduction type semiconductor layer has a layer A formed by exposing the surface of the i-type semiconductor layer to a plasma containing a valence electron controlling agent and a layer B deposited on the layer A by a CVD process using at least the valence electron controlling agent and the main constituent elements of the i-type semiconductor layer.

摘要翻译： 提供适用于实际使用，成本低，可靠性高，光电转换效率高的光电元件及其制造方法。 在具有非单晶半导体层叠的光电元件中，在第一导电型半导体层上层叠至少i型半导体层和第二导电型半导体层，第二导电型半导体层具有层 A通过使用至少化合价电子控制剂和主要构成元素的CVD工艺将i型半导体层的表面暴露于含有价电子控制剂和沉积在层A上的层B的等离子体 i型半导体层。

公开(公告)号：US5716480A

公开(公告)日：1998-02-10

申请号：US678701

申请日：1996-07-11

申请人： Jinsho Matsuyama ,  Ryo Hayashi

发明人： Jinsho Matsuyama ,  Ryo Hayashi

IPC分类号： H01L31/075 ,  H01L31/18 ,  H01L31/20

CPC分类号： H01L31/076 ,  H01L31/075 ,  H01L31/1824 ,  H01L31/202 ,  H01L31/204 ,  H01L31/206 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

摘要： A photovoltaic device having a pin type semiconductor junction in which a p-type semiconductor layer and an n-type semiconductor layer are laminated with an interposed i-type semiconductor layer, comprises at least one doped layer of a non-monocrystal semiconductor disposed under and/or over the i-type semiconductor layer, wherein the at least one doped layer has a surface exposed to a plasma containing a band gap increasing element.

摘要翻译： 具有pin型半导体结的光电器件，其中p型半导体层和n型半导体层与插入的i型半导体层层压，包括至少一个非单晶半导体的掺杂层， /或超过i型半导体层，其中所述至少一个掺杂层具有暴露于含有带隙增加元件的等离子体的表面。