公开(公告)号：US20240072908A1

公开(公告)日：2024-02-29

申请号：US18387717

申请日：2023-11-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Juan Jose Vegas Olmos ,  Elad Mentovich ,  Liran Liss ,  Yonathan Piasetzky

IPC: H04B10/70 ,  G06N10/40 ,  H04B10/60

CPC classification number: H04B10/70 ,  G06N10/40 ,  H04B10/60

Abstract: Embodiments are disclosed for facilitating quantum computing over classical and quantum communication channels. An example system includes a network interface card (NIC) apparatus. The NIC apparatus includes an optical receiver, an embedded processor, and a network switch. The optical receiver is configured to receive qubit data via a first communication channel associated with quantum communication. The embedded processor is configured to convert the qubit data into binary bit data. The network switch is configured to output the binary bit data via a second communication channel associated with classical network communication.

公开(公告)号：US11836083B2

公开(公告)日：2023-12-05

申请号：US17536141

申请日：2021-11-29

Applicant: Mellanox Technologies, Ltd.

Inventor： Ran Avraham Koren ,  Ariel Shahar ,  Liran Liss ,  Gabi Liron ,  Aviad Shaul Yehezkel

IPC: G06F12/0882 ,  G06F13/16 ,  G06F12/0831

CPC classification number: G06F12/0882 ,  G06F12/0833 ,  G06F12/0835 ,  G06F13/1673

Abstract: A compute node includes a memory, a processor and a peripheral device. The memory is to store memory pages. The processor is to run software that accesses the memory, and to identify one or more first memory pages that are accessed by the software in the memory. The peripheral device is to directly access one or more second memory pages in the memory of the compute node using Direct Memory Access (DMA), and to notify the processor of the second memory pages that are accessed using DMA. The processor is further to maintain a data structure that tracks both (i) the first memory pages as identified by the processor and (ii) the second memory pages as notified by the peripheral device.

公开(公告)号：US20230379390A1

公开(公告)日：2023-11-23

申请号：US18363005

申请日：2023-08-01

Applicant: Mellanox Technologies, Ltd.

Inventor： Liran Liss ,  Yamin Friedman ,  Michael Kagan ,  Diego Crupnicoff ,  Idan Burstein ,  Matty Kadosh ,  Tzah Oved ,  Dror Goldenberg ,  Ron Yuval Efraim ,  Alexander Eli Rosenbaum ,  Aviad Yehezkel ,  Rabia Loulou

IPC: H04L67/141 ,  H04L9/08 ,  H04L69/16 ,  H04L67/146 ,  G06F15/173

CPC classification number: H04L67/141 ,  H04L9/0825 ,  H04L69/161 ,  H04L67/146 ,  G06F15/17331

Abstract: Apparatus for data communication includes a network interface for connection to a packet data network and a host interface for connection to a host computer, which includes a central processing unit (CPU) and a host memory. Packet processing circuitry receives, via the host interface, from a kernel running on the CPU, associations between multiple remote direct memory access (RDMA) sessions and multiple different User Datagram Protocol (UDP) 5-tuple, which are assigned respectively to the RDMA sessions, and receives from an application running on the CPU a request to send an RDMA message, using a selected group of one or more of the RDMA sessions, to a peer application over the packet data network, and in response to the request, transmits, via the network interface, one or more data packets using a UDP 5-tuple that is assigned to one of the RDMA sessions in the selected group.

公开(公告)号：US11765079B2

公开(公告)日：2023-09-19

申请号：US17973962

申请日：2022-10-26

Applicant: Mellanox Technologies, Ltd.

Inventor： Boris Pismenny ,  Miriam Menes ,  Idan Burstein ,  Liran Liss ,  Noam Bloch ,  Arie Shahar

IPC: H04L45/00 ,  H04L45/42 ,  G06F11/10 ,  H04L69/163 ,  H04L69/22

CPC classification number: H04L45/566 ,  G06F11/1004 ,  H04L45/38 ,  H04L45/42 ,  H04L69/163 ,  H04L69/22

Abstract: A method includes detecting, by an accelerator of a networking device, a serial number of a first data packet is out of order with respect to a previous data packet within a first flow of data packets associated with a packet communication network, wherein the serial number is assigned to the first data packet according to a transport protocol. The method includes reconstructing context data associated with the first flow of data packets, wherein the context data comprises encoding information for encoding of data records containing data conveyed in payloads of data packets in the first flow of data packets according to a storage protocol. The method includes using, by the accelerator, the reconstructed context data in processing a data record associated with a second data packet within the first flow, wherein the second data packet is subsequent to the first data packet in the first flow of data packets.

公开(公告)号：US20230239257A1

公开(公告)日：2023-07-27

申请号：US17582047

申请日：2022-01-24

Applicant: Mellanox Technologies, Ltd.

Inventor： Boris Pismenny ,  Ben Ben Ishay ,  Gal Yefet ,  Gil Kremer ,  Avi Urman ,  Yorai Itzhak Zack ,  Khalid Manaa ,  Liran Liss

IPC: H04L49/9057 ,  H04L69/22 ,  H04L49/90

CPC classification number: H04L49/9057 ,  H04L69/22 ,  H04L49/9042

Abstract: A peripheral device coupled to a host includes a network interface, a packet processor, and a Data Processing Unit (DPU). The packet processor receives from a communication network, via the network interface, packets that originated from a source in an original order and received at the peripheral device in as order different from the original order. The packet processor splits the received packets into headers and payloads, sends the payloads for storage in a host memory and sends the headers without the payloads for storage in a DPU memory, and based on the headers produces a hint indicative of processing to be applied to the headers, by the DPU, for identifying the original order. Based on the hint, the DPU identifies the original order of the packets by applying the processing indicated by the hint to respective headers in the DPU memory, and notifies the host of the original order.

公开(公告)号：US20230185606A1

公开(公告)日：2023-06-15

申请号：US17899648

申请日：2022-08-31

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Miriam Menes ,  Liran Liss ,  Noam Bloch ,  Idan Burstein ,  Boris Pismenny ,  Ariel Shahar

IPC: G06F9/48 ,  G06F9/50 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F9/5027 ,  G06F9/5072 ,  G06F9/3877

Abstract: In one embodiment, a secure distributed processing system includes nodes connected over a network, and configured to process tasks, each respective one of the nodes including a respective processor to process data of respective ones of the tasks, and a respective network interface controller to connect to other nodes over the network, store task master keys for use in computing communication keys for securing data transfer over the network for respective ones of the tasks, compute respective task and node-pair specific communication keys for securing communication with respective ones of the nodes over the network for respective ones of the tasks responsively to respective ones of the task master keys and node-specific data of respective node pairs, and securely communicate the processed data of the respective ones of the tasks with the respective ones of the nodes over the network responsively to the respective task and node-pair specific communication keys.

公开(公告)号：US11658796B2

公开(公告)日：2023-05-23

申请号：US17231747

申请日：2021-04-15

Applicant: Mellanox Technologies, Ltd.

Inventor： Juan Jose Vegas Olmos ,  Elad Mentovich ,  Liran Liss

IPC: H04L7/00 ,  H04B10/40 ,  H04B10/69 ,  H04L25/03

CPC classification number: H04L7/0029 ,  H04B10/40 ,  H04B10/6971 ,  H04L25/03885

Abstract: Embodiments are disclosed for facilitating an end-to-end link channel with one or more lookup tables for equalization. An example system includes a first transceiver and a second transceiver. The first transceiver includes a clock data recovery (CDR) circuit configured to receive communication data from a switch and to manage a lookup table associated with equalization of the communication data. The first transceiver also includes a first driver circuit communicatively coupled to the CDR circuit and configured to generate an electrical signal associated with the communication data. The second transceiver includes a second driver circuit, communicatively coupled to the first transceiver, that is configured to receive the electrical signal from the first transceiver and to modulate a laser source based on the electrical signal to generate an optical signal via the laser source.

公开(公告)号：US20230099304A1

公开(公告)日：2023-03-30

申请号：US17488362

申请日：2021-09-29

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Haggai Eran ,  Liran Liss ,  Yuval Shpigelman ,  Idan Burstein

IPC: G06F3/06

Abstract: In one embodiment, a system includes a peripheral device including a memory access interface to receive from a host device headers of packets, while corresponding payloads of the packets are stored in a host memory of the host device, and descriptors being indicative of respective locations in the host memory at which the corresponding payloads are stored, a data processing unit memory to store the received headers and the descriptors without the payloads of the packets, and a data processing unit to process the received headers, wherein the peripheral device is configured, upon completion of the processing of the received headers by the data processing unit, to fetch the payloads of the packets over the memory access interface from the respective locations in the host memory responsively to respective ones of the descriptors, and packet processing circuitry to receive the headers and payloads of the packets, and process the packets.

公开(公告)号：US20230046221A1

公开(公告)日：2023-02-16

申请号：US17973962

申请日：2022-10-26

Applicant: Mellanox Technologies, Ltd.

Inventor： Boris Pismenny ,  Miriam Menes ,  Idan Burstein ,  Liran Liss ,  Noam Bloch ,  Arie Shahar

IPC: H04L45/00 ,  H04L45/42 ,  G06F11/10 ,  H04L69/163 ,  H04L69/22

Abstract: A method includes detecting, by an accelerator of a networking device, a serial number of a first data packet is out of order with respect to a previous data packet within a first flow of data packets associated with a packet communication network, wherein the serial number is assigned to the first data packet according to a transport protocol. The method includes reconstructing context data associated with the first flow of data packets, wherein the context data comprises encoding information for encoding of data records containing data conveyed in payloads of data packets in the first flow of data packets according to a storage protocol. The method includes using, by the accelerator, the reconstructed context data in processing a data record associated with a second data packet within the first flow, wherein the second data packet is subsequent to the first data packet in the first flow of data packets.

公开(公告)号：US20230034545A1

公开(公告)日：2023-02-02

申请号：US17963216

申请日：2022-10-11

Applicant: Mellanox Technologies, Ltd.

Inventor： Boris Pismenny ,  Miriam Menes ,  Idan Burstein ,  Liran Liss ,  Noam Bloch ,  Ariel Shahar

IPC: H04L45/00 ,  H04L45/42 ,  G06F11/10 ,  H04L69/163 ,  H04L69/22

Abstract: A system includes a host processor, which has a host memory and is coupled to store data in a non-volatile memory in accordance with a storage protocol. A network interface controller (NIC) receives data packets conveyed over a packet communication network from peer computers containing, in payloads of the data packets, data records that encode data in accordance with the storage protocol for storage in the non-volatile memory. The NIC processes the data records in the data packets that are received in order in each flow from a peer computer and extracts and writes the data to the host memory, and when a data packet arrives out of order, writes the data packet to the host memory without extracting the data and processes the data packets in the flow so as to recover context information for use in processing the data records in subsequent data packets in the flow.