Hybrid Quantum Computing Network
    3.
    发明申请

    公开(公告)号:US20210174237A1

    公开(公告)日:2021-06-10

    申请号:US17110382

    申请日:2020-12-03

    IPC分类号: G06N10/00 G06F9/48 G06F13/40

    摘要: A distributed computing network includes a quantum computation network and a processor. The quantum computation network includes one or more quantum processor units (QPUs) interconnected one with the other using quantum interconnects including each a quantum link and quantum network interface cards (QNICs), where each QPU is further connected to, using the QNIC, a quantum memory. The processor is configured to receive a quantum computation task, and, using a network interface card (NIC) (i) allocate the quantum computation task to the computation network, by activating any of the quantum interconnects between the QPUs according to the quantum computation task, and (ii) solve the quantum computation task using the quantum computation network.

    Hybrid quantum computing network
    4.
    发明授权

    公开(公告)号:US11847533B2

    公开(公告)日:2023-12-19

    申请号:US17110382

    申请日:2020-12-03

    摘要: A distributed computing network includes a quantum computation network and a processor. The quantum computation network includes one or more quantum processor units (QPUs) interconnected one with the other using quantum interconnects including each a quantum link and quantum network interface cards (QNICs), where each QPU is further connected to, using the QNIC, a quantum memory. The processor is configured to receive a quantum computation task, and, using a network interface card (NIC) (i) allocate the quantum computation task to the computation network, by activating any of the quantum interconnects between the QPUs according to the quantum computation task, and (ii) solve the quantum computation task using the quantum computation network.

    END-TO-END LINK CHANNEL WITH LOOKUP TABLE(S) FOR EQUALIZATION

    公开(公告)号:US20220337386A1

    公开(公告)日:2022-10-20

    申请号:US17231747

    申请日:2021-04-15

    摘要: Embodiments are disclosed for facilitating an end-to-end link channel with one or more lookup tables for equalization. An example system includes a first transceiver and a second transceiver. The first transceiver includes a clock data recovery (CDR) circuit configured to receive communication data from a switch and to manage a lookup table associated with equalization of the communication data. The first transceiver also includes a first driver circuit communicatively coupled to the CDR circuit and configured to generate an electrical signal associated with the communication data. The second transceiver includes a second driver circuit, communicatively coupled to the first transceiver, that is configured to receive the electrical signal from the first transceiver and to modulate a laser source based on the electrical signal to generate an optical signal via the laser source.