公开(公告)号：US20240295983A1

公开(公告)日：2024-09-05

申请号：US18646650

申请日：2024-04-25

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/061 ,  G06F3/0679

Abstract: A storage product manufactured as a component to be installed in a computing device to provide network storage services. The storage product has a network interface to receive storage access messages from a remote host system, a bus connector connectable via an external computer bus to an external local host system, a local storage device, and a computational storage processor. The storage product is configured to: separate the storage access messages into first messages, second messages, and third messages; provide the first messages to an external local host system to generate fourth messages; and provide the second messages to the computational storage processor to generate fifth messages. To implement network storage services provided via the network interface, the local storage device executes commands in the third messages, the fourth messages from the local host system, and the fifth messages from the computational storage processor.

公开(公告)号：US20240289271A1

公开(公告)日：2024-08-29

申请号：US18439696

申请日：2024-02-12

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/02 ,  G06F12/06 ,  G06F13/42

CPC classification number: G06F12/0246 ,  G06F12/063 ,  G06F13/4221

Abstract: Memory sub-systems configured to manage storage locations of files for a host system. For example, a connection from a memory sub-system to the host system can support both a cache-coherent memory access protocol to a memory device implemented in the storage capacity of the memory sub-system and a storage access protocol. The memory sub-system can maintain, and share with the host system via the memory device, a medium map configured to identify, for a file stored in the memory sub-system, memory addresses usable for the host system to access locations in the file over the connection using the cache-coherent memory access protocol, and/or logical block addresses usable for the host system to access blocks of the files over the connection using the storage access protocol.

公开(公告)号：US20240264944A1

公开(公告)日：2024-08-08

申请号：US18432518

申请日：2024-02-05

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/0877 ,  G06F12/0815 ,  G06F12/123

CPC classification number: G06F12/0877 ,  G06F12/0815 ,  G06F12/123

Abstract: A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and having storage access queues configured at least in part in the memory sub-system. The memory sub-system can attach, as a memory device, a portion of its fast random access memory over the connection to the host system. One or more storage access queues can be configured in the memory device. The host system can use a cache-coherent memory access protocol to communicate storage access messages over the connection to the random access memory of the memory sub-system. Optionally, the host system can have a memory with second storage access queues usable to access the storage services of the memory sub-system over the connection using a storage access protocol.

公开(公告)号：US20240176535A1

公开(公告)日：2024-05-30

申请号：US18435626

申请日：2024-02-07

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0622 ,  G06F3/0659 ,  G06F3/067

Abstract: A method to provide network storage services to a remote host system, including: generating, from packets received from the remote host system, first control messages and first data messages; buffering, in a random-access memory of a memory sub-system, the first control messages for a local host system to fetch the first control messages, process the first control messages, and generate second control messages; sending the first data messages to a storage device of the memory sub-system without the first data messages being buffered in the random-access memory; communicating the second control messages generated by the local host system to the storage device of the memory sub-system; and processing, within the storage device, the second control messages and the first data messages to provide the network storage services.

公开(公告)号：US11983434B2

公开(公告)日：2024-05-14

申请号：US17866336

申请日：2022-07-15

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/061 ,  G06F3/0679

Abstract: A storage product manufactured as a component to be installed in a computing device to provide network storage services. The storage product has a network interface to receive storage access messages from a remote host system, a bus connector connectable via an external computer bus to an external local host system, a local storage device, and a computational storage processor. The storage product is configured to: separate the storage access messages into first messages, second messages, and third messages; provide the first messages to an external local host system to generate fourth messages; and provide the second messages to the computational storage processor to generate fifth messages. To implement network storage services provided via the network interface, the local storage device executes commands in the third messages, the fourth messages from the local host system, and the fifth messages from the computational storage processor.

公开(公告)号：US11983107B2

公开(公告)日：2024-05-14

申请号：US18101497

申请日：2023-01-25

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/02 ,  G06F3/06 ,  G06F12/0844

CPC classification number: G06F12/0246 ,  G06F3/0614 ,  G06F3/0647 ,  G06F3/0679 ,  G06F12/0284 ,  G06F12/0844 ,  G06F2212/7207

Abstract: A processing device in a memory sub-system identifies a first memory device and a second memory device and configures the second memory device with a zone namespace. The processing device identifies a first portion and a second portion of the first memory device, the first portion storing zone namespace metadata corresponding to the zone namespace on the second memory device. The processing device further exposes the second portion of the first memory device to a host system as a non-zoned addressable memory region.

公开(公告)号：US11960756B2

公开(公告)日：2024-04-16

申请号：US17550967

申请日：2021-12-14

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Joseph Harold Steinmetz

IPC: G06F3/00 ,  G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0679

Abstract: An apparatus with a solid state drive (SSD) having firmware to manage spare storage resources for proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. The firmware is executable in the SSD to allocate storage resources not used or allocated by the host system to support proof of space activities and dynamically return the allocated storage resources when execution of a command from the host system needs additional storage resources.

公开(公告)号：US11947834B2

公开(公告)日：2024-04-02

申请号：US17866300

申请日：2022-07-15

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0622 ,  G06F3/0659 ,  G06F3/067

Abstract: A method to provide network storage services to a remote host system, including: generating, from packets received from the remote host system, first control messages and first data messages; buffering, in a random-access memory of a memory sub-system, the first control messages for a local host system to fetch the first control messages, process the first control messages, and generate second control messages; sending the first data messages to a storage device of the memory sub-system without the first data messages being buffered in the random-access memory; communicating the second control messages generated by the local host system to the storage device of the memory sub-system; and processing, within the storage device, the second control messages and the first data messages to provide the network storage services.

公开(公告)号：US20240069992A1

公开(公告)日：2024-02-29

申请号：US18502713

申请日：2023-11-06

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F9/54 ,  G06F13/16

CPC classification number: G06F9/546 ,  G06F13/1668

Abstract: A storage product manufactured as a standalone computer component, having a bus connector to an external processor, a storage device, a random-access memory, a computational storage processor, and a processing device to identify, among storage access messages from a computer network, first messages, second messages, and third messages. The random-access memory hosts first queues shared between the processing device and the external processor, and second queues shared between the processing device and the computational storage processor. The processing device can place the first messages in the first queues for the external processor to generate fourth messages, place the second messages in the second queues for the computational storage processor to generate fifth messages, and provide the third messages to the storage device. The storage device can process the third messages, the fourth messages, and the fifth messages to implement requests in the storage access messages.

公开(公告)号：US20240036725A1

公开(公告)日：2024-02-01

申请号：US17876355

申请日：2022-07-28

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0619 ,  G06F3/0652 ,  G06F3/0673

Abstract: A victim management unit (MU) for performing a media management operation is identified. The victim MU stores valid data. An ordered set cursors is maintained. A source cursor of the ordered set of cursors associated with the victim MU is identified. A target cursor of the ordered set of cursors referencing one or more available MUs is identified as the cursor following the source cursor in the ordered set of cursors. The valid data is associated with the identified target cursor.