公开(公告)号：US20100022214A1

公开(公告)日：2010-01-28

申请号：US12505671

申请日：2009-07-20

Applicant: Antoine HUE ,  Gabriel Della-Monica ,  Florent Sibille

Inventor： Antoine HUE ,  Gabriel Della-Monica ,  Florent Sibille

IPC: H04B1/06

CPC classification number: H04L25/063

Abstract: A method may compensate for direct current (DC) offset in a radio frequency reception device. The method may include partitioning an analog portion of the reception device into a plurality of zones, for each zone, calibrating initial DC offset compensation to be applied within an operating range of a respective zone, the operating range of the other zones being limited to a threshold operating range, and determining DC offset compensation to be applied to the reception device throughout the operating range based on the basic DC offset compensations.

公开(公告)号：US12209889B2

公开(公告)日：2025-01-28

申请号：US18155531

申请日：2023-01-17

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics France ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Laurent Beyly ,  Olivier Richard ,  Kenichi Oku

IPC: G01D5/24 ,  H03K17/96

Abstract: An embodiment of the present disclosure relates to a method of detection of a touch contact by a sensor including a first step of comparison of a voltage with a first voltage threshold; and a second step of comparison of the voltage with a second voltage threshold, the second step being implemented if the first voltage threshold has been reached within a duration shorter than a first duration threshold, the second voltage threshold being higher than the first voltage threshold.

公开(公告)号：US12143719B2

公开(公告)日：2024-11-12

申请号：US18470702

申请日：2023-09-20

Applicant: STMicroelectronics France ,  STMicroelectronics, Inc. ,  STMicroelectronics (Research & Development) Limited

Inventor： Darin K. Winterton ,  Donald Baxter ,  Andrew Hodgson ,  Gordon Lunn ,  Olivier Pothier ,  Kalyan-Kumar Vadlamudi-Reddy

IPC: H04N23/67 ,  H04N23/61

Abstract: A method includes dividing a field of view into a plurality of zones and sampling the field of view to generate a photon count for each zone of the plurality of zones, identifying a focal sector of the field of view and analyzing each zone to select a final focal object from a first prospective focal object and a second prospective focal object.

公开(公告)号：US11973457B2

公开(公告)日：2024-04-30

申请号：US17323602

申请日：2021-05-18

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Application GMBH ,  STMicroelectronics (Alps) SAS

Inventor： Aldo Occhipinti ,  Christophe Roussel ,  Fritz Burkhardt ,  Ignazio Testoni

IPC: H02P3/18 ,  E05F15/60 ,  H02P6/16 ,  H02P7/03 ,  H02P7/29 ,  H03K3/037 ,  H03K17/687 ,  B60J5/10 ,  B60R16/033

CPC classification number: H02P7/04 ,  E05F15/60 ,  H02P7/29 ,  H03K3/0377 ,  H03K17/6871 ,  B60J5/10 ,  B60R16/033 ,  E05Y2201/434 ,  E05Y2900/548 ,  H03K2217/0063 ,  H03K2217/0072 ,  H03K2217/0081

Abstract: An embodiment driver circuit comprises a power supply pin configured to receive a power supply voltage, and a set of control pins configured to provide a set of control signals for controlling switching of a set of switches of an h-bridge circuit comprising a pair of high-side switches and a pair of low-side switches. The driver circuit comprises control circuitry coupled to the control pins and configured to generate the control signals, and sensing circuitry coupled to the power supply pin and configured to generate a detection signal indicative of the power supply voltage exceeding a threshold value. The control circuitry is sensitive to the detection signal and is configured to generate the control signals to activate one of the pair of high-side switches and the pair of low-side switches and de-activate the other of the pair of high-side switches and the pair of low-side switches.

公开(公告)号：US20240015945A1

公开(公告)日：2024-01-11

申请号：US18347435

申请日：2023-07-05

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics International N.V.

Inventor： Olivier Weber ,  Kedar Janardan Dhori ,  Promod Kumar ,  Shafquat Jahan Ahmed ,  Christophe Lecocq ,  Pascal Urard

IPC: H10B10/00 ,  G11C11/417

CPC classification number: H10B10/12 ,  H10B10/18 ,  G11C11/417

Abstract: In one embodiment, a semiconductor device includes a carrier substrate, a buried dielectric region overlying the carrier substrate, and a semiconductor film separated from the carrier substrate by the buried dielectric region. NMOS transistors and PMOS transistors are disposed at a surface of the semiconductor film and coupled together to form a static random access memory (SRAM) cell. The NMOS transistors and the PMOS transistors each include a gate dielectric layer having a thickness greater than three nanometers and an active region in the semiconductor film. The active region of the PMOS transistors are formed from a silicon-germanium alloy.

公开(公告)号：US20230263082A1

公开(公告)日：2023-08-17

申请号：US18130184

申请日：2023-04-03

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Franck ARNAUD ,  David GALPIN ,  Stephane ZOLL ,  Olivier HINSINGER ,  Laurent FAVENNEC ,  Jean-Pierre ODDOU ,  Lucile BROUSSOUS ,  Philippe BOIVIN ,  Olivier WEBER ,  Philippe BRUN ,  Pierre MORIN

IPC: H10N70/00 ,  G11C13/00 ,  H10B63/00 ,  H10N70/20

CPC classification number: H10N70/8616 ,  G11C13/0004 ,  G11C13/0069 ,  H10B63/30 ,  H10B63/80 ,  H10N70/011 ,  H10N70/021 ,  H10N70/231 ,  H10N70/826 ,  H10N70/882 ,  H10N70/8265 ,  H10N70/8413 ,  G11C2013/008

Abstract: An integrated circuit includes a substrate with an active area, a first insulating layer, a second insulating layer, and a phase-change material. The integrated circuit further includes a heating element in an L-shape, with a long side in direct physical contact with the phase-change material and a short side in direct physical contact with a via. The heating element is surrounded by first, second, and third insulating spacers, with the first insulating spacer having a planar first sidewall in contact with the long side of the heating element, a convex second sidewall, and a planar bottom face in contact with the short side of the heating element. The second and third insulating spacers are in direct contact with the first insulating spacer and the long side of the heating element.

公开(公告)号：US20230228554A1

公开(公告)日：2023-07-20

申请号：US18147927

申请日：2022-12-29

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics S.r.l. ,  STMicroelectronics (Alps) SAS

Inventor： Santi Carlo Adamo ,  Cyril Joubert ,  Bastien Mahtal ,  Damien Giot ,  Hugo Gicquel ,  Alexandre Gimard

IPC: G01B7/30 ,  H03B5/08

CPC classification number: G01B7/30 ,  H03B5/08

Abstract: An electronic system includes a first LC oscillator connected to a first general-purpose input/output (GPIO) circuit and a second LC oscillator connected to a second GPIO circuit. A threshold generator is coupled to an input of the comparator. A control circuit is configured to control a measurement phase comprising a first capture phase and a second capture phase. A microcontroller is coupled to the control circuit and a power management circuit is configured to switch-off the microcontroller following activation of the control circuit by the microcontroller. The control circuit is configured to control the application of an excitation signal to the each oscillator via the respective GPIO circuit, control the GPIO circuit so that oscillations of the oscillator are provided to the comparator, and count, based on an output of the comparator, a number of oscillations in the oscillator exceeding a threshold output by the threshold generator.

公开(公告)号：US20230152126A1

公开(公告)日：2023-05-18

申请号：US18155531

申请日：2023-01-17

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics SA ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Laurent Beyly ,  Oliver Richard ,  Kenichi OKU

IPC: G01D5/24 ,  H03K17/96

CPC classification number: G01D5/24 ,  H03K17/962 ,  H03K2217/9607

Abstract: An embodiment of the present disclosure relates to a method of detection of a touch contact by a sensor including a first step of comparison of a voltage with a first voltage threshold; and a second step of comparison of the voltage with a second voltage threshold, the second step being implemented if the first voltage threshold has been reached within a duration shorter than a first duration threshold, the second voltage threshold being higher than the first voltage threshold.

公开(公告)号：US11653582B2

公开(公告)日：2023-05-16

申请号：US16184246

申请日：2018-11-08

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Franck Arnaud ,  David Galpin ,  Stephane Zoll ,  Olivier Hinsinger ,  Laurent Favennec ,  Jean-Pierre Oddou ,  Lucile Broussous ,  Philippe Boivin ,  Olivier Weber ,  Philippe Brun ,  Pierre Morin

IPC: H01L45/00 ,  H01L27/24 ,  G11C13/00

CPC classification number: H10N70/8616 ,  G11C13/0004 ,  G11C13/0069 ,  H10B63/30 ,  H10B63/80 ,  H10N70/011 ,  H10N70/021 ,  H10N70/231 ,  H10N70/826 ,  H10N70/8265 ,  H10N70/8413 ,  H10N70/882 ,  G11C2013/008

Abstract: An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.

公开(公告)号：US20220382067A1

公开(公告)日：2022-12-01

申请号：US17661381

申请日：2022-04-29

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Research & Development) Limited

Inventor： Quentin Mermillod-Anselme ,  Salim Bouchene ,  Adam Caley

IPC: G02B27/28 ,  G01C3/08 ,  G02B5/30

Abstract: The present disclosure relates to an assembly for an electronic device comprising: a display screen; an optical light emitter adapted to emit an Infrared or near Infrared light beam through the display screen; the optical light emitter and the display screen being of the type that, when an unpolarized light beam from the optical light emitter passes through a region of the display screen, a white spot of a first intensity is formed in the region; a light polarizer positioned between the optical light emitter and the display screen, the light polarizer being orientated such that a white spot of a second intensity, lower than the first intensity, is formed when the light beam, from the optical light emitter and polarized by the light polarizer, passes through the region of the display screen.