公开(公告)号：US07088189B2

公开(公告)日：2006-08-08

申请号：US11007879

申请日：2004-12-09

Applicant: Ulrich L. Rohde ,  Reimund Rebel ,  Ajay Kumar Poddar

Inventor： Ulrich L. Rohde ,  Reimund Rebel ,  Ajay Kumar Poddar

IPC: H03B5/18

CPC classification number: G06K13/0825 ,  H03B5/04 ,  H03B5/1805 ,  H03B5/1847 ,  H03B2200/0028 ,  H03B2200/004 ,  H03B2200/007 ,  H03B2200/0076

Abstract: In one aspect, a voltage controlled oscillator is provided that includes circuitry comprising tunable coupled resonator networks, which are coupled to a terminal of a pair of three-terminal devices through a tuning voltage network which supports wide-band tunability. In another aspect, a wide-band tunable resonator is provided that is amenable to integration in the integrated circuit form.

Abstract translation: 在一个方面，提供了一种压控振荡器，其包括包括可调谐耦合谐振器网络的电路，其通过支持宽带可调性的调谐电压网络耦合到一对三端子装置的端子。 在另一方面，提供了一种宽带可调谐谐振器，其可以集成在集成电路形式中。

公开(公告)号：US20060166107A1

公开(公告)日：2006-07-27

申请号：US11044341

申请日：2005-01-27

Applicant: Xiaoyi Chen ,  Michael Grimbergen ,  Madhavi Chandrachood ,  Jeffrey Tran ,  Ajay Kumar ,  Simon Tam ,  Ramesh Krishnamurthy

Inventor： Xiaoyi Chen ,  Michael Grimbergen ,  Madhavi Chandrachood ,  Jeffrey Tran ,  Ajay Kumar ,  Simon Tam ,  Ramesh Krishnamurthy

IPC: C23F3/00 ,  C03C25/68 ,  B44C1/22 ,  C23F1/00 ,  C03C15/00 ,  G03F1/00

CPC classification number: C23F4/00 ,  G03F1/30 ,  G03F1/54 ,  G03F1/80

Abstract: A method for etching a chromium layer is provided herein. In one embodiment, a method for etching a chromium layer includes providing a filmstack in an etching chamber, the filmstack having a chromium layer partially exposed through a patterned layer, providing at least one halogen containing process gas to a processing chamber, biasing the layer disposed on a substrate support in the processing chamber with a plurality of power pulses less than 600 Watts, and etching the chromium layer through a patterned mask. The method for plasma etching a chromium layer described herein is particularly suitable for fabricating photomasks.

Abstract translation: 本文提供了蚀刻铬层的方法。 在一个实施例中，用于蚀刻铬层的方法包括在蚀刻室中设置膜层，所述膜层具有部分地通过图案化层暴露的铬层，向处理室提供至少一种含卤素的处理气体， 在处理室中的衬底支撑件上具有小于600瓦的多个功率脉冲，并且通过图案化掩模蚀刻铬层。 本文所述的用于等离子体蚀刻铬层的方法特别适用于制造光掩模。

公开(公告)号：US07082432B2

公开(公告)日：2006-07-25

申请号：US10422307

申请日：2003-04-24

Applicant: Sankara R. Bhogi ,  Ajay Kumar ,  Bala Dutt ,  Venugopal Rao K ,  Srinivasan Kannan

Inventor： Sankara R. Bhogi ,  Ajay Kumar ,  Bala Dutt ,  Venugopal Rao K ,  Srinivasan Kannan

IPC: G06F17/30

CPC classification number: G06F9/466 ,  Y10S707/99944 ,  Y10S707/99945

Abstract: A system and method for specifying a transaction manager type at various levels in an application. A system may implement several application components in which each application component may use a different transaction manager type. A transaction manager type may be specified at a module or component level for each of the application components. The transaction manager type may also be specified at an instance wide level.

Abstract translation: 一种用于在应用程序中指定各种级别的事务管理器类型的系统和方法。 系统可以实现几个应用组件，其中每个应用组件可以使用不同的事务管理器类型。 可以在模块或组件级别为每个应用程序组件指定事务管理器类型。 事务管理器类型也可以在实例广泛级别指定。

公开(公告)号：US20060060565A9

公开(公告)日：2006-03-23

申请号：US10418994

申请日：2003-04-17

Applicant: Padmapani Nallan ,  Ajay Kumar ,  Guangxiang Jin

Inventor： Padmapani Nallan ,  Ajay Kumar ,  Guangxiang Jin

IPC: C23F1/00 ,  B44C1/22 ,  C03C15/00 ,  C03C25/68

CPC classification number: H01L21/31116 ,  C23F4/00 ,  H01L21/32137

Abstract: A method of plasma etching a metal layer (e.g., titanium (Ti), tantalum (Ta), tungsten (W), and the like) or a metal-containing layer (e.g., tantalum silicon nitride (TaSiN), titanium nitride (TiN), tungsten nitride (WN), and the like) formed on a hafnium-based dielectric material is disclosed. The metal/metal-containing layer is etched using a gas mixture comprising a halogen-containing gas and a fluorine-containing gas. The fluorine within the gas mixture provides a high etch selectivity for the hafnium-based dielectric material.

Abstract translation: 金属层（例如钛（Ti），钽（Ta），钨（W）等）等等离子体蚀刻或金属含有层（例如，钽氮化硅（TaSiN），氮化钛 ），氮化钨（WN）等）形成在铪基电介质材料上。 使用包含含卤素气体和含氟气体的气体混合物来蚀刻含金属/含金属层。 气体混合物中的氟提供了对铪基电介质材料的高蚀刻选择性。

公开(公告)号：US20060021702A1

公开(公告)日：2006-02-02

申请号：US10909009

申请日：2004-07-29

Applicant: Ajay Kumar ,  Ramesh Krishnamurthy

Inventor： Ajay Kumar ,  Ramesh Krishnamurthy

IPC: H01L21/306 ,  C23F1/00

CPC classification number: H01L21/67167 ,  H01L21/02071 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/67253

Abstract: A method and apparatus for process integration in manufacture of a gate structure of a field effect transistor are disclosed. The method includes assembling an integrated substrate processing system having a metrology module and a vacuumed processing platform to perform controlled and adaptive plasma processes without exposing the substrate to a non-vacuumed environment.

Abstract translation: 公开了一种在场效应晶体管的栅极结构的制造中用于工艺集成的方法和装置。 该方法包括组装具有计量模块和真空处理平台的集成基板处理系统，以执行受控和自适应等离子体处理，而不将基板暴露于非真空环境。

公开(公告)号：US06986660B2

公开(公告)日：2006-01-17

申请号：US10302253

申请日：2002-11-22

Applicant: Ajay Kumar ,  Ines Aravena

Inventor： Ajay Kumar ,  Ines Aravena

IPC: A61C13/277

CPC classification number: A61C8/005 ,  A61C8/0054 ,  A61C8/006 ,  A61C8/0068

Abstract: A dental retaining screw used to secure dental components, such as abutments, copings, and prosthesis to dental implants. The screw having a locking mechanism adapted to prevent the screw from loosening during shipping or while experiencing vibrations. The locking mechanism includes a locking component and biasing members located in the head portion of the retaining screw.

公开(公告)号：US06984585B2

公开(公告)日：2006-01-10

申请号：US10218473

申请日：2002-08-12

Applicant: Chentsau Ying ,  Xiaoyi Chen ,  Padmapani C. Nallan ,  Ajay Kumar

Inventor： Chentsau Ying ,  Xiaoyi Chen ,  Padmapani C. Nallan ,  Ajay Kumar

IPC: H01L21/302

CPC classification number: H01L21/02071 ,  B82Y25/00 ,  B82Y40/00 ,  H01F41/308 ,  H01L21/31133 ,  H01L21/32136 ,  H01L21/32139 ,  H01L43/12

Abstract: A method for removal of residues after plasma etching a film stack comprising a first layer and a sacrificial layer. The method treats a substrate containing the film stack after the first layer of the film stack has been etched to remove residue produced during the etching process. The treatment is performed in a buffered oxide etch wet dip solution that removes the residue and the sacrificial layer.

Abstract translation: 一种用于在等离子体蚀刻包括第一层和牺牲层的薄膜堆叠之后去除残余物的方法。 在蚀刻第一层薄膜叠层之后，该方法处理含有薄膜叠层的基板，以除去在蚀刻过程中产生的残留物。 处理在缓冲氧化物蚀刻湿浸液中进行，其去除残余物和牺牲层。

公开(公告)号：US20050272108A1

公开(公告)日：2005-12-08

申请号：US11134064

申请日：2005-05-20

Applicant: Bhanu Kalra ,  Ajay Kumar

Inventor： Bhanu Kalra ,  Ajay Kumar

IPC: G01N33/53 ,  G01N33/533 ,  G01N33/537 ,  G01N33/543 ,  G01N33/58

CPC classification number: G01N33/533 ,  G01N33/582

Abstract: The present invention provides stabilized chemiluminescent formulations for use in in vitro diagnostics, including competitive as well as sandwich-type immunological assays. The stabilized assay system may be composed of two components, where the first component may contain a chemiluminescent organic compound, an enhancer, a homogenizing agent, and a suitable buffer with formulations having a pH range from about 7.2 to about 12, and optionally a solubilizing agent. The chemiluminescent system of the present invention is useful in immunoenzymatic analytical procedures, such as immunometric, competitive binding and sandwich type assays. In such immunoassays employing the chemiluminescent system of the present invention, the detectable light signal shows a proportional decay with time in the test samples and standards, so that the decay of the light emitted does not effect the concentration of the analyte measured over the entire analyte measurement range of the immunoassay. This allows accurate measurement of analyte concentrations in a test sample over extended periods of time.

Abstract translation: 本发明提供用于体外诊断的稳定的化学发光制剂，包括竞争性和夹心型免疫测定。 稳定化的测定系统可以由两个组分组成，其中第一组分可以含有化学发光有机化合物，增强剂，均化剂和具有约7.2至约12的pH范围的制剂的合适缓冲液，以及任选的增溶 代理商 本发明的化学发光系统可用于免疫酶学分析程序，例如免疫测定，竞争性结合和夹心型测定。 在采用本发明的化学发光系统的这种免疫测定中，可检测的光信号在测试样品和标准品中显示随时间的比例衰减，使得发射的光的衰变不影响在整个分析物上测量的分析物的浓度 测量范围的免疫测定。 这允许在长时间内精确测量测试样品中的分析物浓度。

公开(公告)号：US20050211664A1

公开(公告)日：2005-09-29

申请号：US11130553

申请日：2005-05-16

Applicant: Anisul Khan ,  Ajay Kumar

Inventor： Anisul Khan ,  Ajay Kumar

IPC: G02B6/12 ,  G02B6/122 ,  G02B6/30 ,  B29D11/00

CPC classification number: G02B6/122 ,  G02B6/30 ,  G02B2006/12061 ,  G02B2006/12078 ,  G02B2006/12176

Abstract: Embodiments of optical waveguides and method for their fabrication are provided herein. In one embodiment, a method of making an optical waveguide, includes the steps of providing a substrate comprising a semiconductor layer disposed on a first insulating layer. A hard mask is formed on the semiconductor layer. An opening is then etched in the semiconductor layer to expose a portion of the first insulating layer using the hard mask. A core material is deposited on the first insulating layer to fill the opening. The core material is then planarized and the hard mask removed. A top cladding layer is finally deposited over the core material.

Abstract translation: 本文提供光波导的实施例及其制造方法。 在一个实施例中，制造光波导的方法包括提供包括设置在第一绝缘层上的半导体层的衬底的步骤。 在半导体层上形成硬掩模。 然后在半导体层中蚀刻开口，以使用硬掩模露出第一绝缘层的一部分。 芯材沉积在第一绝缘层上以填充开口。 然后将芯材料平坦化并除去硬掩模。 顶层包层最终沉积在芯材上。

公开(公告)号：US06942813B2

公开(公告)日：2005-09-13

申请号：US10382964

申请日：2003-03-05

Applicant: Chentsau Ying ,  Padmapani C. Nallan ,  Ajay Kumar ,  Xiaoyi Chen

Inventor： Chentsau Ying ,  Padmapani C. Nallan ,  Ajay Kumar ,  Xiaoyi Chen

IPC: C23F4/00 ,  H01F41/30 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/8246 ,  B44C1/22 ,  H01L21/00

CPC classification number: H01F41/308 ,  B82Y10/00 ,  B82Y25/00 ,  B82Y40/00 ,  C23F4/00 ,  H01F41/301 ,  H01J2237/3348 ,  H01L21/31122 ,  H01L21/32136 ,  H01L27/228 ,  H01L43/12

Abstract: A method for etching magnetic and ferroelectric materials using a pulsed substrate biasing technique (PSBT) that applies a plurality of processing cycles to the substrate, where each cycle comprises a period of plasma etching without substrate bias and a period of plasma etching with the substrate bias. In exemplary applications, the method is used for fabricating magneto-resistive random access memory (MRAM) and ferroelectric random access memory (FeRAM) devices.

Abstract translation: 一种使用向基板施加多个处理循环的脉冲衬底偏置技术（PSBT）蚀刻磁性和铁电材料的方法，其中每个循环包括没有衬底偏压的等离子体蚀刻周期和具有衬底偏置的等离子体蚀刻周期 。 在示例性应用中，该方法用于制造磁阻随机存取存储器（MRAM）和铁电随机存取存储器（FeRAM）器件。