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122 条记录 (耗时 0.027 秒)

    Nonvolatile semiconductor storage device and manufacturing method therefor
    111.
    发明授权
    Nonvolatile semiconductor storage device and manufacturing method therefor 失效
    非易失性半导体存储装置及其制造方法

    公开(公告)号：US07489006B2

    公开(公告)日：2009-02-10

    申请号：US11224049

    申请日：2005-09-13

    申请人： Hiroshi Watanabe ,  Atsuhiro Kinoshita ,  Akira Takashima ,  Daisuke Hagishima

    发明人： Hiroshi Watanabe ,  Atsuhiro Kinoshita ,  Akira Takashima ,  Daisuke Hagishima

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A nonvolatile semiconductor storage device includes a semiconductor substrate; a plurality of isolation regions formed in the semiconductor substrate; an element-forming region formed between adjacent isolation regions; a first gate insulating film provided on the element-forming region; a floating gate electrode which is provided on the first gate insulating film and in which a width of a lower hem facing the element-forming region is narrower than a width of the element-forming region in a section taken in a direction perpendicular to a direction in which the isolation regions extend; a second gate insulating film provided on the floating gate electrode; and a control gate electrode provided on the second gate insulating film.

    摘要翻译： 非易失性半导体存储器件包括半导体衬底; 形成在所述半导体衬底中的多个隔离区; 在相邻隔离区域之间形成的元件形成区域; 设置在元件形成区域上的第一栅极绝缘膜; 设置在第一栅极绝缘膜上并且面向元件形成区域的下边缘的宽度比沿着与方向垂直的方向截取的截面中的元件形成区域的宽度窄的浮栅电极 其中隔离区域延伸; 设置在所述浮栅电极上的第二栅极绝缘膜; 以及设置在第二栅极绝缘膜上的控制栅电极。

    AGING DEVICE
    112.
    发明申请
    AGING DEVICE 有权
    老化设备

    公开(公告)号：US20090020803A1

    公开(公告)日：2009-01-22

    申请号：US12173535

    申请日：2008-07-15

    申请人： Hiroshi Watanabe ,  Atsuhiro Kinoshita ,  Shigeki Kobayashi ,  Daisuke Hagishima

    发明人： Hiroshi Watanabe ,  Atsuhiro Kinoshita ,  Shigeki Kobayashi ,  Daisuke Hagishima

    IPC分类号： H01L29/788

    CPC分类号： G04F10/10 ,  G11C16/0408 ,  G11C2216/10 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11558 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7881

    摘要： An aging device according to an embodiment of the present invention includes a semiconductor substrate, first and second diffusion layers provided in a first element region, a floating gate provided above a channel region between the first and second diffusion layers, and a control gate electrode provided beside the floating gate with an interval in the lateral direction. A coupling capacitance between the floating gate and the control gate electrode is larger than a coupling capacitance between the floating gate and the semiconductor substrate.

    摘要翻译： 根据本发明的实施例的老化装置包括半导体衬底，设置在第一元件区域中的第一和第二扩散层，设置在第一和第二扩散层之间的沟道区域上方的浮动栅极和设置在第一和第二扩散层之间的控制栅电极 在浮动门旁边，横向间隔一段距离。 浮置栅极和控制栅电极之间的耦合电容大于浮置栅极和半导体衬底之间的耦合电容。

    Field effect transistor and method of manufacturing the same
    118.
    发明申请
    Field effect transistor and method of manufacturing the same 审中-公开
    场效应晶体管及其制造方法

    公开(公告)号：US20070029577A1

    公开(公告)日：2007-02-08

    申请号：US11440150

    申请日：2006-05-25

    申请人： Atsuhiro Kinoshita ,  Junji Koga

    发明人： Atsuhiro Kinoshita ,  Junji Koga

    IPC分类号： H01L29/76

    CPC分类号： H01L29/0847 ,  H01L21/28097 ,  H01L29/458 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66772 ,  H01L29/7833 ,  H01L29/785 ,  H01L29/78609

    摘要： A field effect transistor includes a first semiconductor region of a first conduction type, a gate electrode formed on the channel region of the first semiconductor region via a gate insulating film, source and drain electrodes formed to interpose the channel region, second semiconductor regions of a second conduction type formed between the source and drain electrodes and the channel region, the second semiconductor regions giving rise to an extension region of the source and drain electrodes, and third semiconductor regions of the second conduction type formed between the source and drain electrodes and each of the first and second semiconductor regions, the third semiconductor regions formed by segregation from the source and drain electrodes and having an impurity concentration higher than that of the second semiconductor regions.

    摘要翻译： 场效应晶体管包括第一导电类型的第一半导体区域，经由栅极绝缘膜形成在第一半导体区域的沟道区上的栅极电极，形成为插入沟道区域的源极和漏极电极，第二半导体区域 形成在源电极和漏电极之间的第二导电类型和沟道区，引起源电极和漏电极的延伸区域的第二半导体区域以及形成在源电极和漏电极之间的第二导电类型的第三半导体区域， 的第一和第二半导体区域的第三半导体区域，所述第三半导体区域通过从所述源极和漏极电极偏析形成，并且具有比所述第二半导体区域的杂质浓度更高的杂质浓度。

    Field effect transistor and manufacturing method thereof
    119.
    发明申请
    Field effect transistor and manufacturing method thereof 失效
    场效应晶体管及其制造方法

    公开(公告)号：US20070007590A1

    公开(公告)日：2007-01-11

    申请号：US11519794

    申请日：2006-09-13

    申请人： Atsuhiro Kinoshita ,  Junji Koga

    发明人： Atsuhiro Kinoshita ,  Junji Koga

    IPC分类号： H01L29/76

    CPC分类号： H01L29/785 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/458 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66643 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/7833 ,  H01L29/7839 ,  H01L29/78618 ,  H01L29/78645

    摘要： A field effect transistor includes a first semiconductor region forming a channel region, a gate electrode insulatively disposed above the first semiconductor region, source and drain electrodes formed to sandwich the first semiconductor region in a channel lengthwise direction, and second semiconductor regions formed between the first semiconductor region and the source and drain electrodes and having impurity concentration higher than the first semiconductor region. The thickness of the second semiconductor region in the channel lengthwise direction is set to a value equal to or less than depletion layer width determined by the impurity concentration so that the second semiconductor region is depleted in a no-voltage application state.

    摘要翻译： 场效应晶体管包括形成沟道区域的第一半导体区域，绝缘地设置在第一半导体区域上方的栅电极，形成为在沟道纵向方向夹着第一半导体区域的源电极和漏电极，以及形成在第一半导体区域之间的第二半导体区域 半导体区域和源极和漏极，并且具有高于第一半导体区域的杂质浓度。 通道长度方向上的第二半导体区域的厚度被设定为等于或小于由杂质浓度确定的耗尽层宽度的值，使得第二半导体区域在无电压施加状态下耗尽。