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128 条记录 (耗时 0.027 秒)

    Semiconductor device, and method for manufacturing semiconductor device
    3.
    发明授权
    Semiconductor device, and method for manufacturing semiconductor device 失效
    半导体装置及半导体装置的制造方法

    公开(公告)号：US08558301B2

    公开(公告)日：2013-10-15

    申请号：US13208454

    申请日：2011-08-12

    申请人： Masao Shingu ,  Akira Takashima ,  Koichi Muraoka

    发明人： Masao Shingu ,  Akira Takashima ,  Koichi Muraoka

    IPC分类号： H01L29/76

    CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/66825

    摘要： There is provided a semiconductor device in which degradation of reliability originating in the interface between an upper insulating layer and an element isolation insulating layer is suppressed. The semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO2, SiN, and SiON, the upper insulating layer is an oxide containing at least one metal M selected from the group consisting of a rare earth metal, Y, Zr, and Hf, and Si, and respective lengths Lcharge, Ltop, and Lgate of the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation “Lcharge

    摘要翻译： 提供一种半导体器件，其中抑制源于上绝缘层和元件隔离绝缘层之间的界面的可靠性的劣化。 半导体器件包括：半导体区域; 多个堆叠结构，其各自设置在所述半导体区域上，并且具有依次堆叠的隧道绝缘膜，电荷存储层，上绝缘层和控制电极; 设置在所述多个堆叠结构的侧面上的元件隔离绝缘层; 以及设置在半导体区域和多个堆叠结构中的源极 - 漏极区域。 元件隔离绝缘层包括SiO 2，SiN和SiON中的至少一种，上绝缘层是含有选自稀土金属，Y，Zr和Hf中的至少一种金属M的氧化物，Si ，并且沟道长度方向上的电荷存储层，上绝缘层和控制电极的各自的长度Lcharge，Ltop和Lgate满足关系“Lcharge

    Resistance change memory
    4.
    发明授权
    Resistance change memory 有权
    电阻变化记忆

    公开(公告)号：US08355275B2

    公开(公告)日：2013-01-15

    申请号：US13239899

    申请日：2011-09-22

    申请人： Reika Ichihara ,  Akira Takashima

    发明人： Reika Ichihara ,  Akira Takashima

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0007 ,  G11C13/003 ,  G11C2213/76

    摘要： According to one embodiment, a resistance change memory includes a memory cell including a resistance change element and a stacked layer structure which are connected in series, a control circuit configured to control a first operation of changing the resistance change element from a first resistance value to a second resistance value lower than the first resistance value, and a voltage pulse generating circuit configured to generate a first voltage pulse to be applied to the memory cell in the first operation. The stacked layer structure includes two conductive layers and an insulating layer formed between the two conductive layers. Amplitude of the first voltage pulse is in a first voltage area in which the stacked layer structure functions as a capacitor. The first voltage pulse satisfies Ron×C

    摘要翻译： 根据一个实施例，电阻变化存储器包括：串联连接的包括电阻变化元件和堆叠层结构的存储单元;控制电路，被配置为控制将电阻变化元件从第一电阻值改变到 第二电阻值低于第一电阻值;以及电压脉冲发生电路，被配置为在第一操作中产生要施加到存储单元的第一电压脉冲。 堆叠层结构包括两个导电层和形成在两个导电层之间的绝缘层。 第一电压脉冲的振幅在第一电压区域中，其中堆叠层结构用作电容器。 第一电压脉冲满足Ron×C

    Method of manufacturing a coil component
    6.
    发明授权
    Method of manufacturing a coil component 有权
    线圈部件的制造方法

    公开(公告)号：US08112872B2

    公开(公告)日：2012-02-14

    申请号：US12213749

    申请日：2008-06-24

    申请人： Shinichi Sato ,  Satoshi Kurimoto ,  Makoto Morita ,  Akira Takashima ,  Sumio Takahashi ,  Yoshiaki Kitajima

    发明人： Shinichi Sato ,  Satoshi Kurimoto ,  Makoto Morita ,  Akira Takashima ,  Sumio Takahashi ,  Yoshiaki Kitajima

    IPC分类号： H01F7/128 ,  H01F7/127

    CPC分类号： H01F17/045 ,  H01F27/027 ,  H01F27/292 ,  H01F27/327 ,  H01F2027/065 ,  Y10T29/4902 ,  Y10T29/49071 ,  Y10T29/49073 ,  Y10T29/49174

    摘要： A coil component having an easily discernible orientation, and a method of producing such a coil component that facilitates the injection of resin. A coil component includes a core with a winding portion, first and second flanges disposed on either end of the winding portion, and a winding accommodating region defined by the winding portion and the first and second flanges, terminal electrodes disposed on the second flange and a winding wound about the winding portion and connected to the terminal electrodes. An insulating resin is formed over the winding at the winding accommodating region. A marker made from a material the same as the insulating resin is provided at outer peripheral surface of the flanges.

    摘要翻译： 具有容易识别的取向的线圈部件，以及制造有助于树脂注入的这种线圈部件的方法。 线圈部件包括具有绕组部分的芯部，布置在绕组部分的任一端上的第一和第二凸缘以及由绕组部分和第一和第二凸缘限定的绕组容纳区域，设置在第二凸缘上的端子电极和 缠绕在绕组部分上并连接到端子电极。 在卷绕容纳区域的绕组上形成绝缘树脂。 由与绝缘树脂相同的材料制成的标记设置在凸缘的外周面上。

    Lanthanoid aluminate film fabrication method
    7.
    发明授权
    Lanthanoid aluminate film fabrication method 有权
    镧系铝酸盐薄膜的制造方法

    公开(公告)号：US08012315B2

    公开(公告)日：2011-09-06

    申请号：US11966304

    申请日：2007-12-28

    申请人： Tsunehiro Ino ,  Akira Takashima

    发明人： Tsunehiro Ino ,  Akira Takashima

    IPC分类号： C23C14/35

    CPC分类号： C23C14/3464 ,  C23C14/08

    摘要： A method of fabricating by co-sputtering deposition a lanthanoid aluminate film with enhanced electrical insulativity owing to suppression of deviation in composition of the film is disclosed. Firstly within a vacuum chamber, hold two separate targets, one of which is made of lanthanoid aluminate (LnAlO3) and the other of which is made of aluminum oxide (Al2O3). Then, transport and load a substrate into the vacuum chamber. Next, introduce a chosen sputtering gas into this chamber. Thereafter, perform sputtering of both the targets at a time to thereby form a lanthanoid aluminate film on the substrate surface. This film is well adaptable for use as ultra-thin high dielectric constant (high-k) gate dielectrics in highly miniaturized metal oxide semiconductor (MOS) transistors.

    摘要翻译： 公开了一种通过共溅射沉积制造具有增强的电绝缘性的镧系铝酸盐膜的方法，这是因为抑制了膜的组成偏差。 首先在真空室内保持两个独立的靶，其中一个靶由铝酸镧（LnAlO3）制成，另一个由氧化铝（Al2O3）制成。 然后，将基板输送并加载到真空室中。 接下来，将选择的溅射气体引入该室。 此后，一次进行两个靶的溅射，从而在基板表面上形成镧系铝酸盐膜。 该薄膜适用于高度小型化的金属氧化物半导体（MOS）晶体管中的超薄高介电常数（高k）栅极电介质。

    Nonvolatile semiconductor memory device and method for manufacturing the same
    8.
    发明授权
    Nonvolatile semiconductor memory device and method for manufacturing the same 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US07902588B2

    公开(公告)日：2011-03-08

    申请号：US11846251

    申请日：2007-08-28

    申请人： Yukie Nishikawa ,  Akira Takashima ,  Koichi Muraoka

    发明人： Yukie Nishikawa ,  Akira Takashima ,  Koichi Muraoka

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/513

    摘要： A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as the first interface and the second interface, respectively; and a control gate electrode. The inter-electrode insulating film includes one or more first elements selected from rare earth elements, one or more second elements selected from Al, Ti, Zr, Hf, Ta, Mg, Ca, Sr and Ba, and oxygen. A composition ratio of the first element, which is defined as the number of atoms of the first element divided by that of the second element, is changed between the first interface and the second interface, and the composition ratio in the vicinity of the first interface is lower than that in the vicinity of the second interface.

    摘要翻译： 非易失性半导体存储器件包括：隧道绝缘膜; 浮栅电极; 分别将面对浮置栅极的界面和面对控制栅电极的界面分别定义为第一界面和第二界面的电极间绝缘膜; 和控制栅电极。 电极间绝缘膜包括选自稀土元素，选自Al，Ti，Zr，Hf，Ta，Mg，Ca，Sr和Ba中的一种或多种第二元素和氧的一种或多种第一元素。 被定义为第一元素的原子数除以第二元素的原子数的第一元素的组成比在第一界面和第二界面之间改变，并且第一界面附近的组成比 低于第二界面附近的位置。

    Method for manufacturing a lanthanum oxide compound
    10.
    发明授权
    Method for manufacturing a lanthanum oxide compound 有权
    氧化镧化合物的制造方法

    公开(公告)号：US07736446B2

    公开(公告)日：2010-06-15

    申请号：US12051286

    申请日：2008-03-19

    申请人： Akira Takashima ,  Koichi Muraoka

    发明人： Akira Takashima ,  Koichi Muraoka

    IPC分类号： C23C16/40

    CPC分类号： C23C14/08 ,  C23C14/24 ,  C23C14/50 ,  C23C14/564 ,  H01L21/31604 ,  H01L21/31641 ,  H01L21/31645

    摘要： A method for manufacturing a lanthanum oxide compound on a substrate includes: setting the number of H2O molecule, the number of CO molecule and the number of CO2 molecule to one-half or less, one-fifth or less and one-tenth or less per one lanthanum atom, respectively, the H2O molecule, the CO molecule and the CO2 molecule being originated from an H2O gas component, a CO gas component and a CO2 gas component in an atmosphere under manufacture; and supplying a metal raw material containing at least one selected from the group consisting of lanthanum, aluminum, titanium, zirconium and hafnium and an oxygen raw material gas simultaneously for the substrate under the condition that the number of O2 molecule are set to 20 or more per one lanthanum atom, thereby manufacturing the lanthanum oxide compound on the substrate.

    摘要翻译： 在基材上制造氧化镧化合物的方法包括：将H 2 O分子的数量，CO分子的数目和CO 2分子的数量设定为每分钟的一半以下，五分之一以下，十分之一以下 一个镧原子分别来自制造气氛中的H 2 O分子，CO分子和CO 2分子源自H 2 O气体组分，CO气体组分和CO 2气体组分; 在氧分子数为20以上的条件下，向基板供给含有选自镧，铝，钛，锆，铪和氧原料气体中的至少一种的金属原料 每一个镧原子，从而在基底上制造氧化镧化合物。