公开(公告)号：US07307829B1

公开(公告)日：2007-12-11

申请号：US11249600

申请日：2005-10-13

Applicant: Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

Inventor： Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

IPC: H01G4/228 ,  H01G4/06

CPC classification number: H01G4/38 ,  H01G2/065 ,  H01G4/30 ,  H05K1/0231 ,  H05K2201/10522 ,  H05K2201/10689

Abstract: A monolithic capacitor structure includes opposed and overlapping plates within a dielectric body, which are arranged to form a lower frequency, higher value capacitor. Other conductive structure is located either inside the dielectric body or on an external surface thereof and is effective to form a higher frequency, lower value capacitor in parallel with the lower frequency, higher value capacitor. The resulting array of combined series and parallel capacitors integral with the dielectric body provides effective wideband performance in an integrated, cost-effective structure.

Abstract translation: 单片电容器结构包括介电体内的相对和重叠的板，它们被布置成形成较低频率的较高值的电容器。 其他导电结构位于电介质体内部或其外表面上，并且有效地与较低频率的较高值电容器并联形成较高频率的较低值电容器。 与电介质体集成的组合串联和并联电容器的阵列在集成的，具有成本效益的结构中提供了有效的宽带性能。

公开(公告)号：US07035080B1

公开(公告)日：2006-04-25

申请号：US10994866

申请日：2004-11-22

Applicant: Lambert Devoe ,  Alan Devoe ,  Daniel Devoe

Inventor： Lambert Devoe ,  Alan Devoe ,  Daniel Devoe

IPC: H01G4/228 ,  H01G4/005

CPC classification number: H01G4/232 ,  H01G2/06 ,  H01L2224/48464 ,  H01L2924/09701 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/0306 ,  H05K1/113 ,  H05K1/162 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09627 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K2203/049

Abstract: A substrate includes a single-layer capacitor and various external contacts. A first external contact provides a first electrical connection to the single-layer capacitor. A second external contact provides a second electrical connection to the single-layer capacitor. The first and third external contacts are electrically connectable to another electrical component, and internal metallization structures or vias of conductive material electrically connect the second contact and the third contact to facilitate the single-layer capacitor being connectable in a parallel circuit with the other electrical component.

Abstract translation: 衬底包括单层电容器和各种外部触点。 第一外部触点提供与单层电容器的第一电连接。 第二外部触点提供与单层电容器的第二电连接。 第一和第三外部触点可电连接到另一个电气部件，并且导电材料的内部金属化结构或通路电连接第二触点和第三触点，以便于单层电容器可以与并联电路与另一个电气部件 。

公开(公告)号：US06969647B2

公开(公告)日：2005-11-29

申请号：US10963231

申请日：2004-10-12

Applicant: Alan Devoe ,  Lambert Devoe ,  Hung Trinh

Inventor： Alan Devoe ,  Lambert Devoe ,  Hung Trinh

IPC: H01G4/005 ,  H01G4/06 ,  H01G4/12 ,  H01G4/228 ,  H01G4/33 ,  H01L21/02 ,  H01L21/8242

CPC classification number: H01G4/005 ,  H01G4/06 ,  H01G4/228 ,  H01G4/33

Abstract: A method of making a monolithic or essentially monolithic single layer capacitor with high structural strength and capacitance. Sheets of green-state ceramic dielectric material and ceramic/metal composite material are laminated together, diced into individual chips, and fired to sinter the ceramic together. The composite material may contain an amount of metal sufficient to render the composite conductive whereby the composite may be used for one or both electrodes and for mounting the capacitor to the pc board. Alternatively, the composite material may contain an amount of metal insufficient to render the composite conductive but sufficient to act as seed points for an electroplating process wherein the composite is preferentially coated with conductive metal, and the coated composite is mounted to the pc board and the coating provides an electrical connection to an internal electrode. Vertically-oriented surface mountable capacitors and hybrid capacitors are provided.

Abstract translation: 制造具有高结构强度和电容的单片或基本单片单层电容器的方法。 将绿色陶瓷电介质材料和陶瓷/金属复合材料片层压在一起，切割成单个芯片，并烧结以将陶瓷烧结在一起。 复合材料可以包含足以使复合材料导电的金属量，由此复合材料可以用于一个或两个电极，并将电容器安装到印刷电路板上。 或者，复合材料可以含有不足以使复合材料导电但足以用作电镀工艺的种子点的金属量，其中复合材料优先涂覆有导电金属，并且涂覆的复合材料安装到印刷电路板和 涂层提供与内部电极的电连接。 提供垂直取向的表面贴装电容器和混合电容器。

公开(公告)号：US06587327B1

公开(公告)日：2003-07-01

申请号：US10150202

申请日：2002-05-17

Applicant: Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

Inventor： Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

IPC: H01G4228

CPC classification number: H01G4/30 ,  H01G4/228 ,  H01G4/38

Abstract: A monolithic capacitor structure includes at least first and second plates internal to a dielectric body, the plates extending inward from opposed conductive contacts on surfaces of the body, and forming capacitor(s) therebetween. A third plate extends within said body, electrically floating relative to the exterior contacts, and forming a capacitor with the first and second plates, and further forming a capacitor with additional conductive structures connected to the conductive contacts on the body. The resulting array of combined series and parallel capacitors formed by the third plate, in conjunction with the capacitor(s) formed by the first and second plates, provides effective wideband performance in an integrated, cost-effective structure.

Abstract translation: 单片电容器结构至少包括介电体内部的第一和第二板，所述板从主体表面上的相对的导电触点向内延伸，并且在它们之间形成电容器。 第三板在所述主体内延伸，相对于外部触头电浮动，以及与第一和第二板形成电容器，并进一步形成具有连接到主体上的导电触点的附加导电结构的电容器。 由第三板形成的所组合的串联和并联电容器阵列与由第一和第二板形成的电容器相结合，在集成的，具有成本效益的结构中提供了有效的宽带性能。