利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

119 条记录 (耗时 0.061 秒)

    Gain control methods and systems in an amplifier assembly
    111.
    发明授权
    Gain control methods and systems in an amplifier assembly 有权
    放大器组件中的增益控制方法和系统

    公开(公告)号：US06798286B2

    公开(公告)日：2004-09-28

    申请号：US10353939

    申请日：2003-01-30

    申请人： Leonard Dauphinee ,  Lawrence M. Burns

    发明人： Leonard Dauphinee ,  Lawrence M. Burns

    IPC分类号： H03G320

    CPC分类号： H01L22/20 ,  G01R31/2607 ,  G01R31/30 ,  G01R31/31723 ,  H01L2924/0002 ,  H03F3/211 ,  H03G3/3036 ,  H03G3/3052 ,  H03G2201/307 ,  H04N5/4446 ,  H04N5/52 ,  H04N7/102 ,  H01L2924/00

    摘要： A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a power of the amplified signal. A comparator module compares the detected power to a high threshold, a low threshold and a target threshold intermediate the high and low thresholds. A controller module changes the gain of the VGA so as to drive the detected power in a direction toward the middle threshold when the comparator module indicates the detected power is not between the high and low thresholds.

    摘要翻译： 可变增益放大器（VGA）根据增益放大输入信号，以产生放大信号。 检测器模块检测指示放大信号的功率的功率。 比较器模块将检测到的功率与高阈值和低阈值中间的高阈值，低阈值和目标阈值进行比较。 当比较器模块指示检测到的功率不在高阈值和低阈值之间时，控制器模块改变VGA的增益以驱动检测到的功率朝向中间阈值的方向。

    Power transfer apparatus for concurrently transmitting data and power over data wires
    112.
    发明授权
    Power transfer apparatus for concurrently transmitting data and power over data wires 有权
    用于同时发送数据并通过数据线上电的电力传送装置

    公开(公告)号：US06753761B2

    公开(公告)日：2004-06-22

    申请号：US10281778

    申请日：2002-10-28

    申请人： David A. Fisher ,  Lawrence M. Burns ,  Stephen E. Muther

    发明人： David A. Fisher ,  Lawrence M. Burns ,  Stephen E. Muther

    IPC分类号： H04B100

    CPC分类号： H04L12/10 ,  H04B3/542 ,  H04B2203/5437 ,  H04B2203/5441 ,  H04B2203/5445 ,  H04B2203/547 ,  H04B2203/5483 ,  H04B2203/5491 ,  Y10T307/832

    摘要： Power supply current, sufficient to power a remote network device, is transmitted concurrently with a network data signal over a transmission line. A power-sourcing network device that can include a coupling circuit provides power and data to the remote network device. The remote network device (which can be a wireless access point) can separate the power signal from the data signal and use the power supply current to further process or retransmit the data signal. The power signal may be a low frequency relative to the frequency of the data signal, or it may be DC.

    摘要翻译： 足以为远程网络设备供电的电源电流通过传输线与网络数据信号同时传输。 可以包括耦合电路的电源网络设备向远程网络设备提供电力和数据。 远程网络设备（其可以是无线接入点）可以将功率信号与数据信号分离，并使用电源电流来进一步处理或重传数据信号。 功率信号可以是相对于数据信号的频率的低频，或者它可以是DC。

    Power transfer apparatus for concurrently transmitting data and power over data wires
    116.
    发明授权
    Power transfer apparatus for concurrently transmitting data and power over data wires 有权
    用于同时发送数据并通过数据线上电的电力传送装置

    公开(公告)号：US06496105B2

    公开(公告)日：2002-12-17

    申请号：US09974237

    申请日：2001-10-10

    申请人： David A. Fisher ,  Lawrence M. Burns ,  Stephen E. Muther

    发明人： David A. Fisher ,  Lawrence M. Burns ,  Stephen E. Muther

    IPC分类号： H04B100

    CPC分类号： H04L12/10 ,  H04B3/542 ,  H04B2203/5437 ,  H04B2203/5441 ,  H04B2203/5445 ,  H04B2203/547 ,  H04B2203/5483 ,  H04B2203/5491 ,  Y10T307/832

    摘要： Electrical supply current, sufficient to power a wireless access point, is transmitted concurrently with a network data signal across a transmission line. A power and data coupler couples the network data signal and the power signal, received through a data input and a power input, respectively, and transmits the coupled signal over the transmission line to a power and data decoupler. The power and data decoupler separates the power signal from the network data signal and supplies those signals to a power output port and a data output port, respectively, for use by a wireless access node. The power signal may be modulated at a low frequency relative to the frequency of the data signal.

    摘要翻译： 足以为无线接入点供电的供电电流通过传输线与网络数据信号同时传输。 电源和数据耦合器分别通过数据输入和电源输入耦合网络数据信号和功率信号，并将传输线上的耦合信号发送到电源和数据解耦器。 功率和数据去耦器将功率信号与网络数据信号分离，并将这些信号分别提供给功率输出端口和数据输出端口，供无线接入节点使用。 功率信号可以相对于数据信号的频率在低频调制。

    Clock recovery circuit and receiver using same
    117.
    发明授权
    Clock recovery circuit and receiver using same 失效
    时钟恢复电路和接收机使用相同

    公开(公告)号：US5671258A

    公开(公告)日：1997-09-23

    申请号：US360259

    申请日：1994-12-20

    申请人： Lawrence M. Burns ,  Scott W. Mitchell

    发明人： Lawrence M. Burns ,  Scott W. Mitchell

    IPC分类号： H03K5/1534 ,  H04L7/033 ,  H04L7/02

    CPC分类号： H04L7/0337 ,  H03K5/1534

    摘要： A receiver for NRZ data does not require a separate transmission media for the clock. Rather, a clock recovery circuit is included in the receiver capable of recovering the clock based on transitions detected in the NRZ data alone. The clock recovery circuit comprises an edge detection circuit which receives the data stream and generates edge detection signals indicating transitions in the data stream. Reference clock generation circuity generates a plurality of reference clock signals shifted in phase with respect to one another. Phase quantizing circuitry is responsive to the edge detection signals and the plurality of reference clock signals. The phase quantizing circuitry generates a quantization signal indicating one of the plurality of reference clock signals having a particular phase relationship to the edge detection signals. Clock selection circuitry, having inputs coupled to the plurality of reference clock signals and an output, is responsive to the quantization signal to select the indicated reference clock as the recovered clock signal for the data stream. The reference clock generation circuity includes a local clock input to receive a local clock, and a reference generator which is responsive to the local clock to generate a first reference wave and a second reference wave one quarter cycle out of phase relative to the first reference wave. A plurality of reference clock generators generate respective reference clock signals in response to the first and second reference waves, each of the reference clock generators generating a reference clock signal having a phase determined by relative amplitudes of the first and second reference waves.

    摘要翻译： 用于NRZ数据的接收机不需要用于时钟的单独的传输介质。 相反，在接收机中包括时钟恢复电路，其能够基于仅在NRZ数据中检测到的转换来恢复时钟。 时钟恢复电路包括边缘检测电路，其接收数据流并产生指示数据流中的转换的边缘检测信号。 参考时钟产生电路产生相对于彼此同相移位的多个参考时钟信号。 相位量化电路响应于边缘检测信号和多个参考时钟信号。 相位量化电路产生指示与边缘检测信号具有特定相位关系的多个参考时钟信号之一的量化信号。 具有耦合到多个参考时钟信号和输出的输入的时钟选择电路响应于量化信号来选择所指示的参考时钟作为数据流的恢复时钟信号。 参考时钟产生电路包括用于接收本地时钟的本地时钟输入和参考发生器，该参考发生器响应于本地时钟以相对于第一参考波产生第一参考波和第四基准波异相四分之一周期 。 多个参考时钟发生器响应于第一和第二参考波产生相应的参考时钟信号，每个参考时钟发生器产生具有由第一和第二参考波的相对幅度确定的相位的参考时钟信号。

    Radio based collision detection for wireless communication system
    118.
    发明授权
    Radio based collision detection for wireless communication system 失效
    基于无线电的无线通信系统碰撞检测

    公开(公告)号：US5657326A

    公开(公告)日：1997-08-12

    申请号：US359539

    申请日：1994-12-20

    申请人： Lawrence M. Burns ,  Allen Podell ,  David A. Fisher ,  Ravi Ramachandran

    发明人： Lawrence M. Burns ,  Allen Podell ,  David A. Fisher ,  Ravi Ramachandran

    IPC分类号： H04B7/26 ,  H04L12/28 ,  H04L12/413 ,  H04L27/20 ,  H04J3/24

    CPC分类号： H04L27/2017 ,  H04L12/413 ,  H04W24/00 ,  H04W84/12

    摘要： A collision detection method and apparatus which is suitable for use in a wireless CSMA/CD network, or other wireless networks where collision detection is provided. The apparatus includes a detector which detects intermodulation or other mixing products of colliding data transmissions at a station in the network, and a signal processor which indicates collisions between the data transmissions based upon characteristics of the intermodulation products. The system is capable of detecting collisions, both between transmissions from the station on which the device is located and transmissions from other sources, and between two transmissions being received from other sources. The station includes a transmitter having an input for a data packet. Resources coupled to the input add a header to the data packet, the header having characteristics monitored by the collision detector circuitry including a pseudo-random bit sequence. Data transmission signals are supplied to the transmitter in response to the header and the data packet. Thus, collisions occurring during transmission of the header sequence have intervals during which a mismatch occurs between the colliding signal and the data transmission.

    摘要翻译： 适用于无线CSMA / CD网络或提供冲突检测的其他无线网络的碰撞检测方法和装置。 该装置包括检测器，其检测在网络中的站处碰撞数据传输的互调或其他混合产物，以及信号处理器，其基于互调产物的特性指示数据传输之间的冲突。 该系统能够检测来自设备所在的站的传输与来自其他源的传输之间的冲突以及从其他源接收的两个传输之间的冲突。 该站包括具有用于数据分组的输入的发射机。 耦合到输入的资源向数据分组添加报头，该报头具有由包括伪随机位序列的冲突检测器电路监控的特征。 响应于报头和数据分组，将数据传输信号提供给发射机。 因此，在报头序列的传输期间发生的冲突具有在冲突信号和数据传输之间出现失配的间隔。

    Digital integrated time of arrival detector
    119.
    发明授权
    Digital integrated time of arrival detector 失效
    数字集成时间到达检测器

    公开(公告)号：US5382848A

    公开(公告)日：1995-01-17

    申请号：US943632

    申请日：1992-09-11

    申请人： Lawrence M. Burns ,  Robert Tso

    发明人： Lawrence M. Burns ,  Robert Tso

    IPC分类号： H03K5/08 ,  H03K5/153

    CPC分类号： H03K5/086

    摘要： A time of arrival detector for an analog pulse signal digitizes the pulse, digitally delays the digitized signal in one path and converts the delayed signal back to a delayed analog version of the input signal. In a second path an undelayed analog version of the input signal is provided. A scaling offset is established to scale the delayed signal larger than the undelayed signal, and the delayed and undelayed signals are then compared to establish a time of arrival for the input pulse. A delta modulator is preferably used to provide the digitized signal, and also to provide the undelayed analog version of the input signal as the smoothed output of an integrator within the delta modulator. The undelayed modulator output is preferably attenuated by -3 dB, with the pulse's time of arrival obtained from the time at which the delayed analog signal rises above the undelayed but attenuated signal. The time of arrival of the pulse's trailing edge is obtained in a similar manner by scaling the undelayed signal larger than the delayed signal, and comparing the two resulting signals to detect when the undelayed signal falls below the delayed signal. The pulse width can then be determined by subtracting the pulse's time of arrival from its time of termination.

    摘要翻译： 模拟脉冲信号的到达时间检测器将脉冲数字化，数字化地延迟一个路径中的数字化信号，并将延迟的信号转换回延迟的模拟版本的输入信号。 在第二路径中，提供了输入信号的未延迟的模拟版本。 建立缩放偏移以缩放比未延迟信号大的延迟信号，然后比较延迟和未延迟的信号以建立输入脉冲的到达时间。 Δ调制器优选地用于提供数字化信号，并且还提供输入信号的未延迟模拟版本作为Δ调制器内积分器的平滑输出。 优选地，衰减衰减的调制器输出衰减-3dB，其中从延迟的模拟信号上升到未延迟但衰减的信号之上的时间获得的脉冲的到达时间。 通过缩放比延迟信号大的未延迟信号，并且比较两个结果信号以检测何时未延迟的信号低于延迟信号，以类似的方式获得脉冲后沿的到达时间。 然后可以通过从其终止时间减去脉冲的到达时间来确定脉冲宽度。