公开(公告)号：US20130342214A1

公开(公告)日：2013-12-26

申请号：US13923777

申请日：2013-06-21

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Yi-shing LIN

IPC: G01R31/36

CPC classification number: G01R31/3658 ,  G01R31/3606

Abstract: A battery management system for a battery pack including a plurality of battery cells connected in series is provided. The battery management system includes a voltage divider, a plurality of switching units and a detection circuit. Each switching unit is corresponding to one of the battery cell and coupled between an anode of the corresponding battery cell and the voltage divider. When a control signal directs one of the switching units to turn on, the voltage divider divides a voltage difference transmitted from the one of the switching units to obtain a divided voltage signal, and transmits the divided voltage signal to the detection circuit, and the detection circuit detects the voltage difference according to the divided voltage signal, wherein the voltage difference is a voltage difference between an anode of the battery cell corresponding to the one of the switching units and a ground.

Abstract translation: 提供了一种包括串联连接的多个电池单体的电池组的电池管理系统。 电池管理系统包括分压器，多个开关单元和检测电路。 每个开关单元对应于电池单元之一并且耦合在相应的电池单元的阳极和分压器之间。 当控制信号指示开关单元中的一个导通时，分压器分离从开关单元之一发送的电压差以获得分压电压信号，并将分压电压信号发送到检测电路，并且检测 电路根据分压电压信号检测电压差，其中电压差是与一个开关单元相对应的电池单体的阳极与地之间的电压差。

公开(公告)号：US20130305014A1

公开(公告)日：2013-11-14

申请号：US13874878

申请日：2013-05-01

Applicant: VIA Technologies, Inc.

Inventor： Mark John Ebersole

IPC: G06F15/78

CPC classification number: G06F15/7842 ,  G06F9/30076 ,  G06F9/30112 ,  G06F9/30138 ,  G06F9/3017 ,  G06F9/30174 ,  G06F9/30189 ,  G06F9/30196 ,  G06F9/4401

Abstract: A microprocessor includes hardware registers that instantiate the Intel 64 Architecture R8-R15 GPRs. The microprocessor associates with each of the R8-R15 GPRs a respective unique MSR address. The microprocessor also includes hardware registers that instantiate the ARM Architecture GPRs. In response to an ARM MRRC instruction that specifies the respective unique MSR address of one of the R8-R15 GPRs, the microprocessor reads the contents of the hardware register that instantiates the specified one of the R8-R15 GPRs into the hardware registers that instantiate two of the ARM GPRs registers. In response to an ARM MCRR instruction that specifies the respective unique MSR address of one of the R8-R15 GPRs, the microprocessor writes into the hardware register that instantiates the specified one of the R8-R15 GPRs the contents of the hardware registers that instantiate two of the ARM Architecture GPRs registers. The hardware registers may be shared by the two Architectures.

Abstract translation: 微处理器包括实例化Intel 64架构R8-R15 GPR的硬件寄存器。 微处理器与每个R8-R15 GPR相关联，分别有独特的MSR地址。 微处理器还包括实例化ARM架构GPR的硬件寄存器。 为了响应指定R8-R15 GPR之一的相应唯一MSR地址的ARM MRRC指令，微处理器读取硬件寄存器中将指定的一个R8-R15 GPR实例化为硬件寄存器的内容，该硬件寄存器实例化为二 的ARM GPR寄存器。 为了响应指定R8-R15 GPR之一的相应唯一MSR地址的ARM MCRR指令，微处理器写入硬件寄存器，将R8-R15 GPR中指定的一个实例化为硬件寄存器的内容，实例化了两个 的ARM架构GPR寄存器。 硬件寄存器可能由两个架构共享。

公开(公告)号：US20130297962A1

公开(公告)日：2013-11-07

申请号：US13935860

申请日：2013-07-05

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Wen-Yu TSENG ,  Hsiao-Chyi LIN

IPC: G06F1/04

CPC classification number: G06F1/04 ,  G06F1/08

Abstract: A clock generator is provided. The clock generator includes a crystal oscillator, an inverter coupled to the crystal oscillator in parallel, a first circuit and a second circuit. The crystal oscillator has a first terminal and a second terminal The inverter generates a first signal and a second signal at the first and second terminals of the crystal oscillator, respectively. The first circuit coupled to the first terminal of the crystal oscillator generates a first clock signal with a constant frequency according to the first signal. The second circuit coupled to the second terminal of the crystal oscillator generates a second clock signal with a variable frequency according to the second signal.

Abstract translation: 提供时钟发生器。 时钟发生器包括晶体振荡器，并联耦合到晶体振荡器的反相器，第一电路和第二电路。 晶体振荡器具有第一端子和第二端子。逆变器分别在晶体振荡器的第一和第二端子处产生第一信号和第二信号。 耦合到晶体振荡器的第一端子的第一电路根据第一信号产生具有恒定频率的第一时钟信号。 耦合到晶体振荡器的第二端子的第二电路根据第二信号产生具有可变频率的第二时钟信号。

公开(公告)号：US20130226997A1

公开(公告)日：2013-08-29

申请号：US13772456

申请日：2013-02-21

Applicant: VIA Technologies, Inc.

Inventor： John K. Lee

IPC: G06F15/167

CPC classification number: G06F15/167 ,  G06F9/4843 ,  H04L67/2842 ,  H04L67/34

Abstract: Disclosed are various embodiments for providing networked applications that are segmented into multiple client-cached executable modules. Multiple networked applications are provided by an application server, and a module cache is maintained in a client. The client obtains a user invocation of a particular functionality associated with a networked application. One of the modules associated with the particular functionality is obtained by the client from the application server over a network in response to determining that the module is not already in the module cache. The module is executed by the client to provide the particular functionality. A data cache may be implemented that includes data blocks that have been used, are being used, or are predicted to be used by the networked application.

Abstract translation: 公开了用于提供被分割成多个客户端缓存的可执行模块的网络应用的各种实施例。 多个网络应用程序由应用程序服务器提供，并且模块缓存在客户端中维护。 客户端获得与联网应用​​相关联的特定功能的用户调用。 响应于确定模块尚未在模块高速缓存中，由客户端通过网络从应用服务器获得与特定功能相关联的模块之一。 该模块由客户端执行以提供特定的功能。 可以实现数据高速缓存，其包括已被使用，正被使用或被预测为联网应用使用的数据块。

公开(公告)号：US20130222020A1

公开(公告)日：2013-08-29

申请号：US13850666

申请日：2013-03-26

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Yeong-Sheng LEE

IPC: H03L7/14

CPC classification number: H03L7/14 ,  H03L7/0816 ,  H03L7/0891 ,  H03L7/099 ,  H04L27/00

Abstract: A signal generation device is provided to generate an output signal with constant frequency. The signal generation device includes a frequency-control circuit and a voltage-controlled delay line. The frequency-control circuit includes a pulse generator, generating a reference pulse signal according to a transition of the reference signal and a comparison pulse signal according to a transition of the comparison result signal, to re-shape the reference signal and the comparison result signal into narrow pulses suitable for clocking and resetting flip-flops.

Abstract translation: 提供信号发生装置以产生具有恒定频率的输出信号。 信号发生装置包括频率控制电路和电压控制延迟线。 频率控制电路包括脉冲发生器，根据比较结果信号的转变，根据参考信号的转变和比较脉冲信号产生参考脉冲信号，以重新形成参考信号和比较结果信号 转换成适合时钟和复位触发器的窄脉冲。

公开(公告)号：US20130187657A1

公开(公告)日：2013-07-25

申请号：US13744982

申请日：2013-01-18

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Hsien YEN

IPC: G01R31/36

CPC classification number: G01R31/3606 ,  G01R31/3624 ,  G01R31/3648 ,  G01R35/005 ,  H01M10/44 ,  H02J7/0078

Abstract: An embodiment of the invention provides a calibration method for an initial discharging curve of a battery. The method includes: acquiring an initial discharging curve of a battery; measuring a first open circuit voltage at a first time point and a second open circuit voltage at a second time point; according to the initial discharging curve, acquiring a first discharge capacity corresponding to the first open circuit voltage and a second discharge capacity corresponding to the second open circuit voltage according to the initial discharging curve; calculating an ideal discharge capacity according to the first discharge capacity and the second discharge capacity; measuring an real discharge capacity between the first time point and the second time point; determining a total discharge capacity difference according to the ideal discharge capacity and the real discharge capacity to calibrate the initial discharging curve to generate a current discharging curve.

Abstract translation: 本发明的实施例提供了一种用于电池的初始放电曲线的校准方法。 该方法包括：获取电池的初始放电曲线; 在第一时间点测量第一开路电压和在第二时间点测量第二开路电压; 根据初始放电曲线，根据初始放电曲线获取与第一开路电压对应的第一放电容量和对应于第二开路电压的第二放电容量; 根据第一放电容量和第二放电容量计算理想的放电容量; 测量第一时间点和第二时间点之间的实际放电容量; 根据理想放电容量和实际放电容量来确定总放电容量差，以校准初始放电曲线以产生电流放电曲线。

公开(公告)号：US20130187609A1

公开(公告)日：2013-07-25

申请号：US13744942

申请日：2013-01-18

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Sheng-Hsien YEN

IPC: H02J7/00

CPC classification number: H02J7/007 ,  H02J7/0016

Abstract: An embodiment of the invention provides a rechargeable battery module including a battery bank having serial connected battery units, a charging transistor providing a charging current to the battery bank, a balancing circuit for detecting and balancing voltage values of battery units and battery bank and a control chip. When a first voltage value of a first battery unit reaches a charge-off voltage, the control chip estimates a first unbalanced voltage difference between the first voltage and the minimal voltage among battery units. The control chip disables the charging transistor and estimates a second unbalanced voltage difference between voltages of the first battery unit and the battery unit having a minimal voltage. The control chip enables the balancing circuit to balance the first battery unit. When the voltage of the first battery is dropped by a calibration target, the charging transistor is enabled.

Abstract translation: 本发明的实施例提供了一种可再充电电池模块，其包括具有串联连接的电池单元的电池组，向电池组提供充电电流的充电晶体管，用于检测和平衡电池单元和电池组的电压值的平衡电路和控制 芯片。 当第一电池单元的第一电压值达到充电关断电压时，控制芯片估计电池单元之间的第一电压和最小电压之间的第一不平衡电压差。 控制芯片禁止充电晶体管并且估计第一电池单元和具有最小电压的电池单元的电压之间的第二不平衡电压差。 控制芯片使平衡电路平衡第一电池单元。 当第一电池的电压由校准目标下降时，充电晶体管被使能。

公开(公告)号：US20130187608A1

公开(公告)日：2013-07-25

申请号：US13744908

申请日：2013-01-18

Applicant: VIA Technologies, Inc.

Inventor： Sheng-Hsien YEN

IPC: H02J7/00

CPC classification number: H02J7/007 ,  H02J7/0016

Abstract: A rechargeable battery module including a plurality of battery cells connected in series, a charging transistor, a balancing circuit and a control chip. The charging transistor is operative to convey a charging current to charge the battery cells. Based on voltage levels of the battery cells, the control chip disables the charging transistor and controls the balancing circuit to perform a first stage battery balance process. After finishing the first stage battery balance process, the control chip enables the charging transistor to charge the battery cells again. After being switched to a constant voltage charging mode, the control chip controls the balancing circuit based on the voltage levels of the battery cells to perform a second stage battery balance process.

Abstract translation: 包括串联连接的多个电池单体的充电电池模块，充电晶体管，平衡电路和控制芯片。 充电晶体管可操作地传送充电电流以对电池单元充电。 基于电池单元的电压电平，控制芯片禁止充电晶体管并控制平衡电路进行第一级电池平衡处理。 在完成第一级电池平衡处理之后，控制芯片使充电晶体管再次对电池单元充电。 在切换到恒压充电模式之后，控制芯片基于电池单元的电压电平来控制平衡电路，以进行第二级电池平衡处理。

公开(公告)号：US20130162635A1

公开(公告)日：2013-06-27

申请号：US13692047

申请日：2012-12-03

Applicant: VIA Technologies, Inc.

Inventor： Zhou Hong ,  Konstantine I. Iourcha ,  Krishna S. Nayak

IPC: G06T9/00 ,  G06T15/04

CPC classification number: G06T9/005 ,  G06T9/00 ,  H03M7/30 ,  H04N19/12 ,  H04N19/124 ,  H04N19/14 ,  H04N19/176 ,  H04N19/186 ,  H04N19/436 ,  H04N19/91 ,  H04N19/94

Abstract: A method implemented in a graphics engine for decoding image blocks to derive an original image is provided. The method comprises receiving at least one encoded image data block at a block decoder, the at least one encoded image data block comprising a plurality of codewords and a bitmap. The method further comprises determining a block type based on the plurality of codewords and selecting a decoder unit among a plurality of decoder units in accordance with the block type.

Abstract translation: 提供了一种在用于解码图像块以导出原始图像的图形引擎中实现的方法。 该方法包括在块解码器处接收至少一个编码图像数据块，所述至少一个编码图像数据块包括多个码字和位图。 该方法还包括基于多个码字确定块类型，并根据块类型在多个解码器单元中选择解码器单元。

公开(公告)号：US20130151731A1

公开(公告)日：2013-06-13

申请号：US13706598

申请日：2012-12-06

Applicant: Via Technologies, Inc.

Inventor： Yi-Lin Lai ,  Hao-Hsuan Chiu ,  Terrance Shih

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  G06F1/266 ,  G06F13/4068 ,  G06F13/426 ,  H02J7/0004 ,  H02J7/007

Abstract: An apparatus is provided for charging a Universal Serial Bus (USB) device according to an optimal charging mode. The apparatus includes a charging module that is configured to obtain a descriptor from the USB device upon detection of the USB device on a USB bus. The charging module includes one or more descriptor entries disposed in a memory and a controller. The one or more descriptor entries include descriptor data, for matching the descriptor to a specific descriptor entry, and charging data, that specifies the optimal charging mode for the USB device. The controller is coupled to the memory, and is configured to match the descriptor to the specific descriptor entry, and is configured to initiate the optimal charging mode on the USB bus according to the charging data.

Abstract translation: 提供了一种用于根据最佳充电模式对通用串行总线（USB）装置充电的装置。 该装置包括一个充电模块，用于在USB总线上检测到USB设备时从USB设备获取描述符。 充电模块包括设置在存储器中的一个或多个描述符条目和控制器。 一个或多个描述符条目包括描述符数据，用于将描述符与特定描述符条目进行匹配，以及指定USB设备的最佳充电模式的计费数据。 控制器耦合到存储器，并且被配置为使描述符与特定描述符条目匹配，并且被配置为根据计费数据在USB总线上启动最佳充电模式。