公开(公告)号：US06177707B1

公开(公告)日：2001-01-23

申请号：US09258430

申请日：1999-02-26

申请人： Ronald Dekker ,  Henricus G. R. Maas ,  Maria H. W. A. Van Deurzen

发明人： Ronald Dekker ,  Henricus G. R. Maas ,  Maria H. W. A. Van Deurzen

IPC分类号： H01L2910

CPC分类号： H01L21/84 ,  H01L21/7624 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/48463 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/00

摘要： A thin film semiconductor device includes a glass supporting body having thereon an insulating substrate which is attached thereto by a layer of adhesive material. On the surface of the substrate facing the supporting body is a layer of semiconductor material which includes therein a semiconductor element, such surface further having thereon a metalization pattern of conductor tracks. An insulating layer is additionally provided between the metalization pattern and the adhesive layer, and has a dielectric constant &egr;r below 3 and a thickness in the range of approximately 20 &mgr;m to 60 &mgr;m. By virtue of such additional layer, parasitic capacitanees between the metalization pattern and an envelope in which the device is included or a printed circuit board on which the device is mounted are reduced substantially, thereby reducing the power consumption of the device.

摘要翻译： 薄膜半导体器件包括玻璃支撑体，其上具有通过粘合剂材料层附接到其上的绝缘基底。 在面向支撑体的基板的表面上是包括半导体元件的半导体材料层，该表面还具有导体轨迹的金属化图案。 在金属化图案和粘合剂层之间另外设置绝缘层，其介电常数ε为3以下，厚度为20μm〜60μm左右。 由于这种附加层，金属化图案与其中包含器件的封套之间的寄生电容或其上安装器件的印刷电路板被大大减小，从而降低了器件的功耗。

公开(公告)号：US6060968A

公开(公告)日：2000-05-09

申请号：US937963

申请日：1997-09-25

申请人： Petrus G. M. Baltus ,  Ronald Dekker ,  Lukas Leijten

发明人： Petrus G. M. Baltus ,  Ronald Dekker ,  Lukas Leijten

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/52 ,  H01L23/66 ,  H01P3/08 ,  H01P5/08 ,  H01P7/08

CPC分类号： H01L23/66 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2924/01079 ,  H01L2924/1301 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/3011

摘要： A device for processing electromagnetic waves in the microwave range, with a body provided with a circuit element which is electrically connected to a strip-type transmission line which comprises conductor tracks, said body being mechanically connected to an insulating substrate via contact bodies. The transmission line is formed by conductor tracks which lie on mutually facing surfaces of the body and the insulating substrate, respectively. The transmission line in the device is present between the body and the insulating substrate, the contact bodies providing a separation between the conductor tracks. Thus, it is not necessary then to use a second side of the body remote from the insulating substrate for the manufacture of transmission lines.

摘要翻译： 一种用于在微波范围内处理电磁波的装置，其中主体设置有电连接到包括导体轨道的条形传输线的电路元件，所述主体通过接触体与绝缘基板机械连接。 传输线分别由位于主体和绝缘基板的相互面对的表面上的导体轨迹形成。 设备中的传输线存在于主体和绝缘基板之间，接触体提供导体轨迹之间的间隔。 因此，不需要使用远离绝缘基板的主体的第二面来制造传输线。

公开(公告)号：US5780354A

公开(公告)日：1998-07-14

申请号：US576538

申请日：1995-12-21

申请人： Ronald Dekker ,  Henricus G.R. Maas ,  Steffen Wilhelm Hahn

发明人： Ronald Dekker ,  Henricus G.R. Maas ,  Steffen Wilhelm Hahn

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/336 ,  H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/498 ,  H01L27/12 ,  H01L29/786 ,  H04L21/20

CPC分类号： H01L21/6835 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L27/1203 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/30105 ,  Y10S438/928 ,  Y10S438/958

摘要： A method of manufacturing a semiconductor device which starts with a semiconductor wafer which is provided with a layer of semiconductor material lying on an insulating layer at a first side. Semiconductor elements and conductor tracks are formed on this first side of the semiconductor wafer. Then the semiconductor wafer is fastened with this first side to a support wafer, and material is removed from the semiconductor wafer from its other, second side until the insulating layer has been exposed. The method starts with a semiconductor wafer whose insulating layer is an insulating as well as a passivating layer. The semiconductor device must be provided with a usual passivating layer after its manufacture in order to protect it against moisture and other influences. In the method described here, such a passivating layer is present already before the manufacture of the semiconductor device starts.

摘要翻译： 一种制造半导体器件的方法，该半导体器件从在第一侧设置有位于绝缘层上的半导体材料层的半导体晶片开始。 半导体元件和导体轨迹形成在半导体晶片的第一侧上。 然后将半导体晶片与该第一侧紧固到支撑晶片，并且材料从其另一侧除去半导体晶片，直到绝缘层暴露。 该方法从其绝缘层是绝缘的半导体晶片以及钝化层开始。 半导体器件在其制造之后必须设置有通常的钝化层，以便防止其受潮和其它影响。 在这里描述的方法中，这种钝化层在半导体器件的制造开始之前已经存在。

公开(公告)号：US5739591A

公开(公告)日：1998-04-14

申请号：US889716

申请日：1997-07-08

申请人： Ronald Dekker ,  Henricus G. R. Maas

发明人： Ronald Dekker ,  Henricus G. R. Maas

IPC分类号： H01L27/04 ,  H01L21/58 ,  H01L21/68 ,  H01L21/76 ,  H01L21/822 ,  H01L23/482 ,  H01L23/528 ,  H01L23/48

CPC分类号： H01L21/6835 ,  H01L23/4825 ,  H01L24/29 ,  H01L24/83 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/1134 ,  H01L2224/24225 ,  H01L2224/2919 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/19041

摘要： A semiconductor device with a carrier body on which a substrate is fastened by means of a glue layer, which substrate is provided at its first side facing the carrier body with a semiconductor element and with a pattern of conductor tracks comprising contact electrodes for external contacting from the second side of the substrate facing away from the carrier body. The substrate is provided with windows at the areas of the contact electrodes for external contacting from the second side. The process steps preceding the gluing of the substrate to the carrier body are carried out in a clean room suitable for the manufacture of semiconductor elements, whereas the remaining process steps are preferably carried out in a final mounting room. Expensive lithographical equipment need not be available in both rooms, because the comparatively large windows can be formed by means of a simple contact mask.

摘要翻译： 一种具有载体的半导体器件，其上通过胶层将衬底紧固在该衬底上，该衬底在其与载体主体相对的第一面处设置有半导体元件，并且具有包括用于外部接触的接触电极的导体轨迹图案 衬底的背离载体的第二面。 基板在接触电极的区域处设置有用于从第二侧进行外部接触的窗口。 在将衬底粘合到载体上之前的工艺步骤在适于制造半导体元件的洁净室中进行，而其余工艺步骤优选在最终安装室中进行。 两个房间都不需要昂贵的光刻设备，因为可以通过简单的接触面罩形成比较大的窗户。

公开(公告)号：US5554256A

公开(公告)日：1996-09-10

申请号：US310824

申请日：1994-09-22

申请人： Armand Pruijmboom ,  Ronald Koster ,  Cornelis E. Timmering ,  Ronald Dekker

发明人： Armand Pruijmboom ,  Ronald Koster ,  Cornelis E. Timmering ,  Ronald Dekker

IPC分类号： H01L21/31 ,  H01L21/308 ,  H01L21/76 ,  H01L21/00

CPC分类号： H01L21/308 ,  H01L21/76

摘要： A method of manufacturing a semiconductor device comprising a semiconductor body (1) with field insulation regions (14) formed by grooves (10; 24) filled with an insulating material (13) is disclosed. The grooves (10; 24) are etched into the semiconductor body (1) with the use of an etching mask (9) formed on an auxiliary layer (6) provided on a surface (5) of the semiconductor body (1). The auxiliary layer (6) is removed from the portion (11) of the surface (5) situated next to the etching mask (9) before the grooves (10; 24) are etched into the semiconductor body (1), and the auxiliary layer (6) is removed from the edge (12) of the surface (5) situated below the etching mask (9) after the grooves (10; 24) have been etched into the semiconductor body. Furthermore, a layer (13) of the insulating material is deposited on the semiconductor body (1), whereby the grooves (10; 24) are filled and the edge (12) of the surface (5) situated below the etching mask (9) is covered. Then the semiconductor body is subjected to a treatment whereby material is taken off parallel to the surface (5) down to the auxiliary layer (6), and finally the remaining portion of the auxiliary layer (6) is removed. Field insulation regions are thus formed which extend over an edge (12) of the active regions (15) surrounded by the field insulation regions (14) with a strip (18) which has no overhanging edge.

摘要翻译： 公开了一种制造半导体器件的方法，该半导体器件包括具有由绝缘材料（13）填充的沟槽（10; 24）形成的场绝缘区域（14）的半导体本体（1）。 使用形成在设置在半导体本体（1）的表面（5）上的辅助层（6）上的蚀刻掩模（9），将凹槽（10; 24）蚀刻到半导体本体（1）中。 在凹槽（10; 24）被蚀刻到半导体本体（1）中之前，从邻近蚀刻掩模（9）的表面（5）的部分（11）去除辅助层（6），并且辅助层 在凹槽（10; 24）被蚀刻到半导体本体中之后，从位于蚀刻掩模（9）下方的表面（5）的边缘（12）去除层（6）。 此外，绝缘材料的层（13）沉积在半导体本体（1）上，由此填充凹槽（10; 24），并且位于蚀刻掩模（9）下方的表面（5）的边缘（12） ）被覆盖。 然后对半导体体进行处理，由此将材料平行于表面（5）取下到辅助层（6），最后除去辅助层（6）的剩余部分。 这样形成了场绝缘区域，该区域由具有不突出边缘的条带（18）在由绝缘区域（14）包围的有源区域（15）的边缘（12）上延伸。

公开(公告)号：US5399899A

公开(公告)日：1995-03-21

申请号：US173839

申请日：1993-12-27

申请人： Ronald Dekker ,  Henricus G. R. Maas ,  Dirk J. Gravesteijn ,  Martinus P. J. G. Versleijen

发明人： Ronald Dekker ,  Henricus G. R. Maas ,  Dirk J. Gravesteijn ,  Martinus P. J. G. Versleijen

IPC分类号： H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/73 ,  H01L29/72

CPC分类号： H01L27/0825

摘要： A semiconductor device with a semiconductor body (1) is provided with a first and a second bipolar transistor (T1, T2, respectively) in a cascode configuration, in which the semiconductor body (1) comprises, in that order, a collector region (10) and a base region (11) of the first transistor (T1), a region (12) which forms both an emitter region of the first transistor (T1) and a collector region of the second transistor (T2), a space charge region (13), and a base region (14) and emitter region (15) of the second transistor (T2), while the regions form pn junctions with one another which extend parallel to a main surface (2) of the semiconductor body (1). The base region (14) and the emitter region (15) of the second transistor (T2) adjoin a main surface (3) of the semiconductor body (1). According to the invention, a depression (4) is provided in this main surface (3), cutting through the emitter region (12) of the first transistor (T1) which at the same time is the collector region (12) of the second transistor (T2), the space charge region (13), and the base region (14) of the second transistor (T2) and laterally bounding these; regions, while a connection electrode (B1) for the base region (11) of the first transistor (T1) is provided in the depression (4). No latch-up by a parasitic transistor then takes place in the device.

摘要翻译： 具有半导体本体（1）的半导体器件以共成型结构设置有第一和第二双极晶体管（T1，T2），其中半导体主体（1）依次包括集电极区域 10）和第一晶体管（T1）的基极区域（11），形成第一晶体管（T1）的发射极区域和第二晶体管（T2）的集电极区域的区域（12），空间电荷 区域（13）以及第二晶体管（T2）的基极区域（14）和发射极区域（15），同时区域形成彼此平行于半导体主体的主表面（2）延伸的pn结（ 1）。 第二晶体管（T2）的基极区域（14）和发射极区域（15）与半导体本体（1）的主表面（3）相邻。 根据本发明，在该主表面（3）中设置凹陷（4），切割第一晶体管（T1）的发射极区域（12），同时是第二晶体管的集电极区域（12） 晶体管（T2），空间电荷区域（13）和第二晶体管（T2）的基极区域（14）并且横向地限制它们; 区域，而在第一晶体管（T1）的基极区域（11）的连接电极（B1）设置在凹部（4）中。 然后在器件中不会发生寄生晶体管的闩锁。