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公开(公告)号:US20220358063A1
公开(公告)日:2022-11-10
申请号:US17503392
申请日:2021-10-18
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Tzahi Oved , Achiad Shochat , Liran Liss , Noam Bloch , Aviv Heller , Idan Burstein , Ariel Shahar , Peter Paneah
Abstract: Computing apparatus includes a host computer, including at least first and second host bus interfaces. A network interface controller (NIC) includes a network port, for connection to a packet communication network, and first and second NIC bus interfaces, which communicate via first and second peripheral component buses with the first and second host bus interfaces, respectively. Packet processing logic, in response to packets received through the network port, writes data to the host memory concurrently via both the first and second NIC bus interfaces in a sequence of direct memory access (DMA) transactions, and after writing the data in any given DMA transaction, writes a completion report to the host memory with respect to the given DMA transaction while verifying that the completion report will be available to the CPU only after all the data in the given DMA transaction have been written to the host memory.
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公开(公告)号:US11184439B2
公开(公告)日:2021-11-23
申请号:US16827912
申请日:2020-03-24
Applicant: Mellanox Technologies, Ltd.
Inventor: Haggai Eran , Dotan David Levi , Maxim Fudim , Liran Liss
IPC: H04L29/08 , G06F13/28 , G06F15/173
Abstract: A network node includes a bus switching element, and a network adapter, an accelerator and a host, all coupled to communicate via the bus switching element. The network adapter is configured to communicate with remote nodes over a communication network. The host is configured to establish a RDMA link between the accelerator and the RDMA endpoint by creating a Queue Pair (QP) to be used by the accelerator for communication with the RDMA endpoint via the RDMA link. The accelerator is configured to exchange data, via the network adapter, between a memory of the accelerator and a memory of the RDMA endpoint.
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公开(公告)号:US11055104B2
公开(公告)日:2021-07-06
申请号:US16660838
申请日:2019-10-23
Applicant: Mellanox Technologies, Ltd.
Inventor: Yuval Itkin , Liran Liss
IPC: G06F9/4401 , G06F13/40
Abstract: A network adapter includes one or more network ports, multiple bus interfaces and a processor. The network ports are configured to communicate with a communication network. The bus interfaces are configured to communicate with multiple respective CPUs of a multi-CPU device. The processor is included in the network adapter and is configured to support an Option-ROM functionality, in which the network adapter holds Option-ROM program instructions that are loadable and executable by the multi-CPU device during a boot process, to expose the support of the Option-ROM functionality to the multi-CPU device over only a single bus interface, selected from among the multiple bus interfaces, and, by loading the Option-ROM program instructions to the multi-CPU device, to cause the multi-CPU device to present to a user only a single, non-redundant set of commands for managing all the multiple bus interfaces of the network adapter via the single bus interface.
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公开(公告)号:US20210124590A1
公开(公告)日:2021-04-29
申请号:US16660838
申请日:2019-10-23
Applicant: Mellanox Technologies, Ltd.
Inventor: Yuval Itkin , Liran Liss
IPC: G06F9/4401 , G06F13/40
Abstract: A network adapter includes one or more network ports, multiple bus interfaces and a processor. The network ports are configured to communicate with a communication network. The bus interfaces are configured to communicate with multiple respective CPUs of a multi-CPU device. The processor is included in the network adapter and is configured to support an Option-ROM functionality, in which the network adapter holds Option-ROM program instructions that are loadable and executable by the multi-CPU device during a boot process, to expose the support of the Option-ROM functionality to the multi-CPU device over only a single bus interface, selected from among the multiple bus interfaces, and, by loading the Option-ROM program instructions to the multi-CPU device, to cause the multi-CPU device to present to a user only a single, non-redundant set of commands for managing all the multiple bus interfaces of the network adapter via the single bus interface.
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公开(公告)号:US10708240B2
公开(公告)日:2020-07-07
申请号:US15841339
申请日:2017-12-14
Applicant: Mellanox Technologies, Ltd.
Inventor: Adi Menachem , Liran Liss , Boris Pismenny
Abstract: Computing apparatus includes a host processor, which runs a virtual machine monitor (VMM), which supports a plurality of virtual machines and includes a cryptographic security software module. A network interface controller (NIC) links the host processor to a network so as to transmit and receive data packets from and to the virtual machines and includes a cryptographic security hardware logic module, which when invoked by the VMM, applies the cryptographic security protocol to the data packets while maintaining a state context of the protocol with respect to each of the virtual machines. Upon encountering an exception in applying the cryptographic security protocol, the NIC transfers the data packet, together with the state context of the cryptographic security protocol with respect to the given virtual machine, to the cryptographic security software module for processing.
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公开(公告)号:US10331595B2
公开(公告)日:2019-06-25
申请号:US14918599
申请日:2015-10-21
Applicant: Mellanox Technologies Ltd.
Inventor: Shachar Raindel , Liran Liss
Abstract: A method for interaction by a central processing unit (CPU) and peripheral devices in a computer includes allocating, in a memory, a work queue for controlling a first peripheral device of the computer. The CPU prepares a work request for insertion in the allocated work queue, the work request specifying an operation for execution by the first peripheral device. A second peripheral device of the computer submits an instruction to the first peripheral device to execute the work request that was prepared by the CPU and thereby to perform the operation specified by the work request.
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公开(公告)号:US20190190838A1
公开(公告)日:2019-06-20
申请号:US15844658
申请日:2017-12-18
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Alex Shpiner , Liran Liss , Matty Kadosh
IPC: H04L12/851 , H04L12/875 , H04L12/833 , H04L12/863 , H04L12/865
Abstract: A network element connected to a data network holds a flow of data packets in a queue and periodically determines a metric of the queue. Responsively to a predetermined value of the metric the queue is associated with an elephant flow or a mouse flow. The packets are marked according to the associated flow, and the network element sends the marked packets into the data network. Other network elements process the packets according to the associated flow marked therein.
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公开(公告)号:US10250635B2
公开(公告)日:2019-04-02
申请号:US15652285
申请日:2017-07-18
Applicant: Mellanox Technologies, Ltd.
Inventor: Alex Shpiner , Liran Liss , Matty Kadosh
IPC: H04L29/06
Abstract: A processor is configured to receive, from a client, a first message indicating a request to establish a connection between the client and a server, to ascertain that the first message does not include any cookie satisfying one or more criteria, to send, to the client, a second message that includes a first cookie, without allocating an endpoint on the server for the connection, in response to ascertaining that the first message does not include any cookie satisfying the criteria, to receive subsequently, from the client, a third message, to ascertain that the third message includes a second cookie, and that the second cookie satisfies the criteria, to allocate the endpoint for the connection in response to ascertaining that the second cookie satisfies the criteria, and to send, to the client, a fourth message indicating that the server is ready to receive data communication at the allocated endpoint.
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公开(公告)号:US10152441B2
公开(公告)日:2018-12-11
申请号:US15154945
申请日:2016-05-14
Applicant: Mellanox Technologies Ltd.
Inventor: Liran Liss , Shachar Raindel , Shlomo Raikin , Adi Menachem , Yuval Itkin
IPC: G06F13/00 , G06F13/38 , G06F13/42 , G06F13/28 , H04L12/861 , G06F13/40 , H04L12/935
Abstract: Peripheral apparatus for use with a host computer includes an add-on device, which includes a first network port coupled to one end of a packet communication link and add-on logic, which is configured to receive and transmit packets containing data over the packet communication link and to perform computational operations on the data. A network interface controller (NIC) includes a host bus interface, configured for connection to the host bus of the host computer and a second network port, coupled to the other end of the packet communication link. Packet processing logic in the NIC is coupled between the host bus interface and the second network port, and is configured to translate between the packets transmitted and received over the packet communication link and transactions executed on the host bus so as to provide access between the add-on device and the resources of the host computer.
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公开(公告)号:US10146721B2
公开(公告)日:2018-12-04
申请号:US15051750
申请日:2016-02-24
Applicant: Mellanox Technologies Ltd.
Inventor: Yuval Itkin , Liran Liss , Amir Ancel , Ran Sofer
IPC: G06F15/173 , G06F13/42 , G06F13/36 , G06F13/40
Abstract: A method for management of a host computer that includes a management controller configured to carry out, independently of the host CPU, host management instructions contained in management packets compliant with a first data link protocol. The method includes receiving the management packets from a first network operating in accordance with the first data link protocol. The management packets are encapsulated in data packets compliant with a second data link protocol, different from the first data link protocol. The data packets are transmitted to a second network, operating in accordance with the second data link protocol. The transmitted data packets are received from the second network in a network interface controller (NIC), which is installed in the host computer and connected to the second network. The NIC decapsulates the management packets from the received data packets and passes the decapsulated management packets via a sideband connection to the management controller.
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