公开(公告)号：US07474714B2

公开(公告)日：2009-01-06

申请号：US10334935

申请日：2002-12-31

申请人： Chamath Abhayagunawardhana ,  Dave Dunning ,  Sanjay Dabral ,  Ken Drottar

发明人： Chamath Abhayagunawardhana ,  Dave Dunning ,  Sanjay Dabral ,  Ken Drottar

IPC分类号： H04L27/00

CPC分类号： H04L7/033

摘要： A receiving device within a digital electronic system includes a sampling unit, a voter block, and a local clock phase adjustment unit. The sampling unit samples an input line at three points in time at intervals of one half of a bit period. The sampling unit delivers the values obtained in the sampling process to the voter block. The voter block determines whether to deliver an up or a down vote to the local clock phase adjustment unit. The voter block communicates with the local clock phase adjustment unit via up and down control signals. The local clock phase adjustment unit determines whether the local clock phase should be adjusted, and if so, whether to advance or delay the local clock phase. If certain meta-stable conditions are observed by the voter block, the voter block will vote in one direction in order to push the system out of the meta-stable condition.

摘要翻译： 数字电子系统内的接收装置包括采样单元，选举块和本地时钟相位调整单元。 采样单元在三个时间点以一个位周期的一半的间隔对输入行进行采样。 采样单元将采样过程中获得的值传递给选举块。 选民块决定是否向本地时钟相位调整单位输出向上或向下的投票。 选举块通过上下控制信号与本地时钟相位调整单元进行通信。 本地时钟相位调整单元确定是否应调整本地时钟相位，如果是，是否提前或延迟本地时钟相位。 如果选民块观察到某些元稳定条件，则选民块将以一个方向投票，以将该制度推出元稳定状态。

公开(公告)号：US20080122463A1

公开(公告)日：2008-05-29

申请号：US11479888

申请日：2006-06-30

申请人： Sanjay Dabral ,  Mohiuddin Mazumder ,  Ken Drottar ,  Larry Tate ,  John Critchlow

发明人： Sanjay Dabral ,  Mohiuddin Mazumder ,  Ken Drottar ,  Larry Tate ,  John Critchlow

IPC分类号： G01R31/308

CPC分类号： G01R1/071 ,  G01R31/311 ,  G01R31/31728 ,  G01R31/3177

摘要： Testing microelectronic devices using electro-optic modulator probes is disclosed. In one aspect, a testing apparatus may include an electrical signaling medium to exchange electrical signals with a microelectronic device. The testing apparatus may include an electro-optic modulator probe to provide optical signals that are modulated by the electrical signals. An optoelectronic transducer may be included to convert the modulated optical signals to modulated electrical signals. The testing apparatus may further include a logic analyzer module to receive and analyze the modulated electrical signals. Other testing apparatus are disclosed, as well as systems incorporating such apparatus, and various methods of testing microelectronic devices.

摘要翻译： 公开了使用电光调制器探针测试微电子器件。 在一个方面，测试装置可以包括用于与微电子装置交换电信号的电信令介质。 测试装置可以包括电光调制器探针，以提供由电信号调制的光信号。 可以包括光电转换器以将经调制的光信号转换成调制的电信号。 测试装置还可以包括用于接收和分析调制的电信号的逻辑分析器模块。 公开了其它测试装置，以及结合这种装置的系统以及测试微电子装置的各种方法。

公开(公告)号：US07362739B2

公开(公告)日：2008-04-22

申请号：US10874511

申请日：2004-06-22

申请人： Naveen Cherukuri ,  Tim Frodsham ,  Eduard Roytman ,  Sanjay Dabral ,  Rahul Shah ,  Theodore Z. Schoenborn ,  Maurice B. Steinman ,  David S. Dunning

发明人： Naveen Cherukuri ,  Tim Frodsham ,  Eduard Roytman ,  Sanjay Dabral ,  Rahul Shah ,  Theodore Z. Schoenborn ,  Maurice B. Steinman ,  David S. Dunning

IPC分类号： H04B7/216

CPC分类号： H04J3/0688 ,  H04L43/00 ,  H04L43/0847

摘要： Methods and apparatuses for determining clock failure for a multi-agent system employing a link-based interconnection scheme using a forwarded clock. For one embodiment of the invention, the cessation of the forwarded clock initiates a clock failure determination process. For one embodiment of the invention, upon a determination of clock failure, an alternate clock lane is implemented using a pre-designated data lane.

摘要翻译： 用于确定使用转发时钟的基于链路的互连方案的多代理系统的时钟故障的方法和装置。 对于本发明的一个实施例，转发时钟的停止启动时钟失败确定过程。 对于本发明的一个实施例，在确定时钟故障时，使用预先指定的数据通道实现备用时钟通道。

公开(公告)号：US20080065924A1

公开(公告)日：2008-03-13

申请号：US11978849

申请日：2007-10-30

申请人： Tim Frodsham ,  Michael Tripp ,  David O'Brien ,  Muraleedhara Navada ,  Naveen Cherukuri ,  Sanjay Dabral ,  David Dunning ,  Theodore Schoenborn

发明人： Tim Frodsham ,  Michael Tripp ,  David O'Brien ,  Muraleedhara Navada ,  Naveen Cherukuri ,  Sanjay Dabral ,  David Dunning ,  Theodore Schoenborn

IPC分类号： G06F1/12

CPC分类号： G06F13/4273 ,  G06F5/06

摘要： A technique for promoting determinism among bus agents within a point-to-point (PtP) network. More particularly, embodiments of the invention relate to techniques to compensate for link latency, data skew, and clock shift within a PtP network of common system interface (CSI) bus agents.

公开(公告)号：US07320094B2

公开(公告)日：2008-01-15

申请号：US10623605

申请日：2003-07-22

申请人： Victor W. Lee ,  Phanindra K. Mannava ,  Akhilesh Kumar ,  Sanjay Dabral

发明人： Victor W. Lee ,  Phanindra K. Mannava ,  Akhilesh Kumar ,  Sanjay Dabral

IPC分类号： H04L7/00

CPC分类号： H04L1/0061 ,  H04J2203/0089 ,  H04L1/0072 ,  H04L25/4906 ,  H04L2001/0094

摘要： Systems and methods of retraining a receiver provide for determining a minimum transition density for a derived clock data link to the receiver. A retraining flit is generated based on the minimum transition density. In one approach, the retraining flit is generated by defining control data and payload data for the retraining flit. Error detection data is determined for the retraining flit based on the control and the payload data. The control data, the payload data and the error detection data have sufficient transitions to meet the minimum transition density.

摘要翻译： 重新接收接收机的系统和方法提供用于确定到接收机的导出时钟数据链路的最小转换密度。 基于最小过渡密度产生再培训。 在一种方法中，通过为再训练飞行定义控制数据和有效载荷数据来产生再训练飞行。 基于控制和有效载荷数据确定重新训练飞行的错误检测数据。 控制数据，有效载荷数据和误差检测数据具有足够的过渡以满足最小转换密度。

公开(公告)号：US20080003842A1

公开(公告)日：2008-01-03

申请号：US11479889

申请日：2006-06-30

申请人： Sanjay Dabral ,  Mohiuddin Mazumder ,  Hai-Feng Liu ,  Larry Tate

发明人： Sanjay Dabral ,  Mohiuddin Mazumder ,  Hai-Feng Liu ,  Larry Tate

IPC分类号： H01R12/00

CPC分类号： G02B6/43 ,  G01R1/071 ,  G02B2006/12138 ,  G02B2006/12159 ,  H01R13/6587

摘要： An electrical connector to be electrically disposed between a first circuit board and a second circuit board to electrically couple the first circuit board with the second circuit board is disclosed. The electrical connector may have an electro-optic modulator to modulate optical signals based on electrical signals exchanged between the first and second circuit boards through the electrical connector. Systems incorporating such electrical connectors, and methods of using the electrical connectors and systems, such as for debug, are also disclosed.

摘要翻译： 公开了一种电气设置在第一电路板和第二电路板之间以将第一电路板与第二电路板电耦合的电连接器。 电连接器可以具有电光调制器，用于基于通过电连接器在第一和第二电路板之间交换的电信号来调制光信号。 还公开了包括这种电连接器的系统，以及使用电连接器和系统的方法，例如用于调试。

公开(公告)号：US07313712B2

公开(公告)日：2007-12-25

申请号：US10850733

申请日：2004-05-21

申请人： Naveen Cherukuri ,  Jeffrey R. Wilcox ,  Sanjay Dabral ,  Phanindra K. Mannava ,  Aaron T. Spink ,  David S. Dunning ,  Tim Frodsham ,  Theodore Z. Schoenborn

发明人： Naveen Cherukuri ,  Jeffrey R. Wilcox ,  Sanjay Dabral ,  Phanindra K. Mannava ,  Aaron T. Spink ,  David S. Dunning ,  Tim Frodsham ,  Theodore Z. Schoenborn

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3209 ,  G06F1/3253 ,  H04L12/12 ,  Y02D10/151 ,  Y02D50/20 ,  Y02D50/40

摘要： Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.

摘要翻译： 公开了用于点对点链路的低功率状态的方法，装置和系统的实施例。 在低功率状态期间，差分发送对的两个导体上的信号被驱动到电气空闲。 模拟活动检测器在低功率状态期间被使能，并且在正常功率状态期间被禁用。 退出低功耗状态不需要物理层重新初始化的顺序。 还描述和要求保护其他实施例。

公开(公告)号：US20070071083A1

公开(公告)日：2007-03-29

申请号：US11237118

申请日：2005-09-28

申请人： Karthisha Canagasaby ,  Muraleedhara Navada ,  Sanjay Dabral

发明人： Karthisha Canagasaby ,  Muraleedhara Navada ,  Sanjay Dabral

IPC分类号： H03H7/30

CPC分类号： H04L25/0282 ,  H04L25/0276 ,  H04L25/0288

摘要： In one embodiment, the present invention includes a method for associating a first plurality of current sources with a first tap coefficient and associating a second plurality of current sources with a second tap coefficient. A first plurality of output switches coupled to the first plurality of current sources is gated using the first tap coefficient and a second plurality of output switches coupled to the second plurality of current sources is gated using the second tap coefficient. In such manner, the first and second plurality of equalized current sources may be driven onto an interconnect. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括用于将第一多个电流源与第一抽头系数相关联并将第二多个电流源与第二抽头系数相关联的方法。 耦合到第一多个电流源的第一多个输出开关使用第一抽头系数进行门控，并且使用第二抽头系数选择耦合到第二多个电流源的第二多个输出开关。 以这种方式，第一和第二多个均衡的电流源可以被驱动到互连上。 描述和要求保护其他实施例。

公开(公告)号：US20070025492A1

公开(公告)日：2007-02-01

申请号：US11171114

申请日：2005-06-30

申请人： Karthisha Canagasaby ,  Ken Drottar ,  David Dunning ,  Sanjay Dabral

发明人： Karthisha Canagasaby ,  Ken Drottar ,  David Dunning ,  Sanjay Dabral

IPC分类号： H04L23/00

CPC分类号： H04L25/0282

摘要： A source terminated serial link can recover from a low power mode by turning on multiple current-mode drivers in a phased sequence where the phased sequence is related to a resonant characteristic of a power supply net.

摘要翻译： 源端接串行链路可以通过在分相序列中打开多个电流模式驱动器从低功率模式恢复，其中相序序列与电源网络的谐振特性相关。

公开(公告)号：US20060220674A1

公开(公告)日：2006-10-05

申请号：US11094810

申请日：2005-03-31

申请人： Evelina Yeung ,  Karthisha Canagasaby ,  Sanjay Dabral

发明人： Evelina Yeung ,  Karthisha Canagasaby ,  Sanjay Dabral

IPC分类号： H03K19/003

CPC分类号： H03K19/00323 ,  H03K19/018528

摘要： A pre-driver circuit includes a first stage to generate a first pre-driver signal and a second stage to generate a second pre-driver signal. The first and second stages are to generate the first and second pre-driver signals to cross at a point which reduces rise-and-fall mismatch in differential signal outputs from a current-mode driver.

摘要翻译： 预驱动器电路包括产生第一预驱动器信号的第一级和产生第二预驱动器信号的第二级。 第一和第二阶段是产生第一和第二预驱动器信号以在减少来自当前模式驱动器的差分信号输出的上升和下降失配的点处交叉。