公开(公告)号：US06778594B1

公开(公告)日：2004-08-17

申请号：US09592016

申请日：2000-06-12

Applicant: Bin Liu

Inventor： Bin Liu

IPC: H04B138

CPC classification number: H04L27/22 ,  H03D3/009

Abstract: A communications receiver architecture characterized by a relatively low intermediate frequency (IF) and a polyphase filter. The receiver includes an input amplifier coupled to a carrier signal. Respective I and Q demodulators are coupled to the output of the input amplifier. A quadrature local oscillator (LO) generator provides respective LO_I and LO_Q inputs to the I demodulator and LO_Q inputs to the I demodulator and to the Q demodulator. The quadrature LO generator is driven by a phase-locked LO, and the LO frequency is such that an IF of, in one embodiment, approximately 1 MHz results. The I demodulator and Q demodulator outputs are applied through respective A/D converters to a polyphase filter. The polyphase filter outputs are then processed by a digital I/Q demodulator. Although a low IF is not generally understood to promote the image rejection performance of a receiver, substantial image rejection is afforded by the polyphase filter, thereby enabling the receiver to be realized almost entirely as a monolithic integrated semiconductor device.

Abstract translation: 一种以相对低的中频（IF）和多相滤波器为特征的通信接收机架构。 接收机包括耦合到载波信号的输入放大器。 相应的I和Q解调器耦合到输入放大器的输出端。 正交本地振荡器（LO）发生器向I解调器提供相应的LO_I和LO_Q输入，并向I解调器和Q解调器提供LO_Q输入。 正交LO发生器由锁相LO驱动，LO频率使得在一个实施例中，IF的IF约为1MHz。 I解调器和Q解调器输出通过相应的A / D转换器应用于多相滤波器。 多相滤波器输出由数字I / Q解调器处理。 虽然通常不理解低IF以促进接收机的镜像抑制性能，但是由多相滤波器提供了大量的图像抑制，从而使接收机几乎完全可以实现为单片集成半导体器件。

公开(公告)号：US06740759B1

公开(公告)日：2004-05-25

申请号：US09666481

申请日：2000-09-20

Applicant: Masayuki Morita ,  Guo-bin Liu ,  Noriko Yoneta

Inventor： Masayuki Morita ,  Guo-bin Liu ,  Noriko Yoneta

IPC: C07D27503

CPC classification number: C07D275/03

Abstract: Chlorinating agent is reacted with a compound represented by formula (I) (wherein R represents C1 to C8 alkyl groups or aralkyl groups) or a compound represented by formula (II) in a solvent in which hydrogen chloride is insoluble or has low solubility.

Abstract translation: 在氯化氢不溶或溶解性低的溶剂中，将氯化剂与式（I）表示的化合物（其中R表示C1〜C8烷基或芳烷基）或式（Ⅱ）表示的化合物反应。

公开(公告)号：US06680962B2

公开(公告)日：2004-01-20

申请号：US10136925

申请日：2002-04-29

Applicant: Bin Liu ,  Ali Shakouri

Inventor： Bin Liu ,  Ali Shakouri

IPC: H01S3083

CPC classification number: H01S5/10 ,  H01S5/1032 ,  H01S5/1071 ,  H01S5/4056

Abstract: A ring resonator coupled laser is described, which has a gain region for creating light radiation, ring resonators for providing a strong mode selection and Vernier effect for wide wavelength tunability, passive waveguides for coupling the light and a pair of reflective mirrors for forming a laser cavity. By combining the ring resonators with the reflective mirrors, a strongly frequency-dependent passive mirror with complex amplitude reflectivity is formed and this ring resonator coupled laser exhibits single longitudinal mode operation with a high side mode suppression ratio, narrow linewidth and reduced frequency chirp. By using two slightly different ring resonators, the wavelength tunability is greatly enhanced. Thus, electro-optic effect is preferred for high speed wavelength tuning in the ring resonator coupled laser.

Abstract translation: 描述了一种环形谐振器耦合激光器，其具有用于产生光辐射的增益区域，用于为宽波长可调性提供强模式选择和游标效应的环形谐振器，用于耦合光的无源波导和用于形成激光的一对反射镜 腔。 通过将环形谐振器与反射镜组合，形成具有复振幅反射率的强频率相关无源镜，该环形谐振器耦合激光器具有高侧模抑制比，窄线宽和降低频率啁啾的单纵模运行。 通过使用两个稍微不同的环形谐振器，波长可调性大大提高。 因此，在环形谐振器耦合激光器中的高速波长调谐中，优选电光效应。

公开(公告)号：US06560449B1

公开(公告)日：2003-05-06

申请号：US09591925

申请日：2000-06-12

Applicant: Bin Liu

Inventor： Bin Liu

IPC: H04B110

CPC classification number: H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0024

Abstract: In a communications receiver for quadrature demodulation, a feedback technique for reducing the image response of the receiver. The communications receiver includes an I demodulator and a Q demodulator. A local oscillator (LO) signal is provided by a PLL to a quadrature LO generator that provides an LO_I signal to an I demodulator and an LO_Q signal to a Q demodulator. The LO_I and LO_Q signals are amplitude and phase-controlled versions of the LO signal. An image/signal ratio (I/S) detector detects the relative phase difference and the relative amplitude difference between the respective output terminals of the I demodulator and the Q demodulator and applies an amplitude control signal and a phase control signal to corresponding amplitude control and phase control inputs of the quadrature LO generator. The I/S detector calibrates the quadrature LO generator during the interstitial interval between the reception of data packets. The control signals from the I/S detector adjust the relative amplitude and phase of the LO_I and LO_Q signals in a manner that reduces the image response of the communications receiver.

Abstract translation: 在用于正交解调的通信接收机中，用于减小接收机的图像响应的反馈技术。 通信接收机包括I解调器和Q解调器。 本地振荡器（LO）信号由PLL提供给正交LO发生器，其向I解调器提供LO_I信号，并向Q解调器提供LO_Q信号。 LO_I和LO_Q信号是LO信号的幅度和相位控制版本。 图像/信号比（I / S）检测器检测I解调器和Q解调器的各个输出端之间的相对相位差和相对幅度差，并将幅度控制信号和相位控制信号施加到对应的幅度控制， 正交LO发生器的相位控制输入。 I / S检测器在接收数据包之间的间隔间隔期间校准正交LO发生器。 来自I / S检测器的控制信号以减少通信接收机的图像响应的方式调节LO_I和LO_Q信号的相对幅度和相位。

公开(公告)号：US06414557B1

公开(公告)日：2002-07-02

申请号：US09507114

申请日：2000-02-17

Applicant: Bin Liu

Inventor： Bin Liu

IPC: H03B502

CPC classification number: H03F3/45183 ,  H03F3/4565 ,  H03F3/72 ,  H03F2203/7203 ,  H03K3/0231 ,  H03K3/0322 ,  H03K5/133 ,  H03K2005/00208 ,  H03L7/0995

Abstract: A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differential delay circuit generating a differential output signal that is a delayed (and preferably inverted) version of a differential input signal. Each differential delay circuit includes first and second input transistors for receiving the differential input signal. Each differential delay circuit also includes first and second load transistors coupled in parallel with the respective first and second input transistors. Each differential delay circuit further includes a first current source coupled between the first input transistor and a first power supply terminal (e.g., a voltage supply terminal), a second current source coupled between the second input transistor and the first power supply terminal and a third current source coupled between the first and second input transistors and a second power supply terminal (e.g., a ground terminal). The first and second current sources reduce the coupling of noise from the first power supply terminal to the output. The third current source reduces the coupling of noise from the second power supply terminal to the output.

公开(公告)号：US06385376B1

公开(公告)日：2002-05-07

申请号：US09425543

申请日：1999-10-22

Applicant: John E. Bowers ,  Bin Liu ,  Patrick Abraham ,  Boo-Gyoun Kim ,  Ali Shakouri

Inventor： John E. Bowers ,  Bin Liu ,  Patrick Abraham ,  Boo-Gyoun Kim ,  Ali Shakouri

IPC: G02B642

CPC classification number: G02B6/12 ,  G02B6/12002 ,  G02B6/12007 ,  G02B6/125 ,  G02B2006/12078 ,  G02B2006/12097 ,  G02F1/3132 ,  G02F2001/3135

Abstract: A vertical directional coupler fabricated using wafer fusion with a very short coupling length for fabrication of switches, filters and other electro-optic devices. Using the fused vertical coupler, planar waveguides can be fabricated on two different substrates in a three-dimensional structure in which there is vertical coupling between arrays through fused regions. Switches, including crossbar switches based on coupling between independent arrays of waveguides, as well as filters, can be fabricated.

Abstract translation: 使用具有非常短的耦合长度的晶片熔合件制造开关，滤波器和其它电光器件的垂直定向耦合器。 使用熔融垂直耦合器，平面波导可以在三维结构中的两个不同的衬底上制造，其中通过熔融区域在阵列之间存在垂直耦合。 可以制造包括基于独立的波导阵列之间的耦合的交叉开关的开关以及滤波器。

公开(公告)号：US5968793A

公开(公告)日：1999-10-19

申请号：US881687

申请日：1997-06-24

Applicant: Zhan-Bin Liu ,  Joan Tellefsen Odell

Inventor： Zhan-Bin Liu ,  Joan Tellefsen Odell

IPC: A01H5/00 ,  C07K14/035 ,  C07K14/395 ,  C07K14/415 ,  C12N5/10 ,  C12N15/09 ,  C12N15/82 ,  C12N5/14 ,  A01H1/04 ,  A01H5/10 ,  C12N15/90

CPC classification number: C07K14/005 ,  C07K14/395 ,  C07K14/415 ,  C12N15/8217 ,  C12N2710/16622

Abstract: A method for regulating gene expression in a stably transformed transgenic plant cell utilizing a Gal4 chimeric transcription factor is described.

Abstract translation: 描述了使用Gal4嵌合转录因子调节稳定转化的转基因植物细胞中的基因表达的方法。

公开(公告)号：US5804489A

公开(公告)日：1998-09-08

申请号：US679196

申请日：1996-07-12

Applicant: Fu-Liang Yang ,  Erik S. Jeng ,  Yu-Chun Ho ,  Bin Liu ,  Chao-Ming Koh

Inventor： Fu-Liang Yang ,  Erik S. Jeng ,  Yu-Chun Ho ,  Bin Liu ,  Chao-Ming Koh

IPC: H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10852 ,  H01L27/10817

Abstract: The present invention is a method of manufacturing crown shape capacitors in the semiconducter memories. Using a single step etching to farbricate the capacitor in a DRAM cell. The method can form side wall polymers and etching byproductions on the surface of the first polysilicon, using the side wall polymers and the etching byproductions as a mask to form the crown shape capacitors with pillars. Moreover, this present invention can form the crown shape structure and pillars in the same step, the crown shape structure and the pillars increase the surface area of the capacitor. Therefore the present invention will increase the performance of the capacitor.

Abstract translation: 本发明是在半导体存储器中制造冠状电容器的方法。 使用单步蚀刻来超越DRAM单元中的电容器。 该方法可以使用侧壁聚合物和蚀刻副产物作为掩模形成侧壁聚合物并在第一多晶硅的表面上蚀刻副产物，以形成具有支柱的冠状电容器。 此外，本发明可以在相同的步骤中形成冠状结构和柱，冠状结构和柱增加电容器的表面积。 因此，本发明将增加电容器的性能。

公开(公告)号：US5780339A

公开(公告)日：1998-07-14

申请号：US850908

申请日：1997-05-02

Applicant: Bin Liu ,  Wen-Jya Liang ,  Yeh-Sen Lin

Inventor： Bin Liu ,  Wen-Jya Liang ,  Yeh-Sen Lin

IPC: H01L21/8242

CPC classification number: H01L27/10852

Abstract: This present invention is a method of fabricating a semiconductor memory cell in a DRAM. This invention utilizes a inter plug technique and nitride sidewall spacers to improve deep node contact etching damage and reduce the number of mask steps for typical landing pad processes. Thus, the method of this invention allows the manufacture of a semiconductor memory cell that reduces the difficulties due to the high aspect ratio of the contact hole of a storage node.

Abstract translation: 本发明是一种在DRAM中制造半导体存储单元的方法。 本发明利用插塞技术和氮化物侧壁间隔物来改善深层接触蚀刻损伤并减少典型的着陆焊盘工艺的掩模步骤的数量。 因此，本发明的方法允许制造半导体存储单元，其减少由于存储节点的接触孔的高纵横比引起的困难。

公开(公告)号：USD1043335S1

公开(公告)日：2024-09-24

申请号：US29856527

申请日：2022-10-14

Applicant: Bin Liu

Designer： Bin Liu

Abstract: FIG. 1 is a front, right and top perspective view of a card box showing my new design;
FIG. 2 is a rear, left and bottom perspective view thereof;
FIG. 3 is a front view thereof;
FIG. 4 is a rear view thereof;
FIG. 5 is a left view thereof;
FIG. 6 is a right view thereof;
FIG. 7 is a top view thereof;
FIG. 8 is a bottom view thereof;
FIG. 9 is a partially exploded perspective view thereof, showing a top portion removed, and a middle portion and a bottom portion assembled;
FIG. 10 is an exploded perspective view thereof, showing a top, middle and a bottom portion; and,
FIG. 11 is an exploded perspective view thereof, showing a middle portion in an unfolded condition.