公开(公告)号：US06846739B1

公开(公告)日：2005-01-25

申请号：US09031617

申请日：1998-02-27

Applicant: David A. Cathey ,  Trung T. Doan

Inventor： David A. Cathey ,  Trung T. Doan

IPC: C23C16/40 ,  H01L21/4763 ,  H01L21/76 ,  H01L21/768

CPC classification number: H01L21/76829 ,  C23C16/403 ,  H01L21/76831 ,  H01L21/76834

Abstract: An inventive process is disclosed for creating a barrier layer on a silicon substrate of an in-process integrated circuit. The process uses MOCVD to form a metal oxide film. The source gas is preferably an organometallic compound. Ozone is used as an oxidizing agent in order to react with the source gas at a low temperature and fully volatilize carbon from the source gas. The high reactivity of ozone at a low temperature provides a more uniform step coverage on contact openings. The process is used to create etch stop layers and diffusion barriers.

Abstract translation: 公开了用于在过程中集成电路的硅衬底上形成阻挡层的发明方法。 该方法使用MOCVD形成金属氧化物膜。 源气体优选为有机金属化合物。 使用臭氧作为氧化剂，以便在低温下与原料气反应并使源自气体的碳完全挥发。 臭氧在低温下的高反应性在接触开口上提供更均匀的步骤覆盖。 该方法用于产生蚀刻停止层和扩散阻挡层。

公开(公告)号：US06638445B2

公开(公告)日：2003-10-28

申请号：US09149474

申请日：1998-09-08

Applicant: Robert T. Rasmussen ,  Surjit S. Chadha ,  David A. Cathey

Inventor： Robert T. Rasmussen ,  Surjit S. Chadha ,  David A. Cathey

IPC: C09K1300

CPC classification number: H01L21/31111 ,  H01L21/02071 ,  Y10S148/051 ,  Y10T428/24802

Abstract: The present invention is directed to a novel etching process for a semiconductor material which inhibits corrosion of metal comprised of pretreating the material, preferably with a surfactant, and then exposing the material to a mixture comprising salt, a buffered oxide etch, and optionally a surfactant.

Abstract translation: 本发明涉及一种用于半导体材料的新型蚀刻工艺，其抑制金属腐蚀，包括预处理材料，优选用表面活性剂，然后将材料暴露于包含盐，缓冲氧化物蚀刻和任选的表面活性剂 。

公开(公告)号：US06633113B2

公开(公告)日：2003-10-14

申请号：US10146627

申请日：2002-05-14

Applicant: Zhongyi Xia ,  Jimmy J. Browning ,  Charles M. Watkins ,  David A. Cathey

Inventor： Zhongyi Xia ,  Jimmy J. Browning ,  Charles M. Watkins ,  David A. Cathey

IPC: H01J102

CPC classification number: H01J29/085

Abstract: A high resolution field emission display includes a faceplate and a baseplate. The faceplate includes a transparent viewing layer, a transparent conductive layer formed on the transparent viewing layer and intersecting stripes of light-absorbing, opaque insulating material formed on the transparent conductive layer. The insulating material defines openings less than one hundred microns wide between the intersecting stripes. The faceplate also includes a plurality of localized regions of cathodoluminescent material, each formed in one of the openings. The cathodoluminescent material includes a metal oxide providing reduced resistivity in the cathodoluminescent material. Significantly, the reduced resistivity of the cathodoluminescent material together with the focusing effect of the insulating material provide increased acuity in luminous images formed on the faceplate. The baseplate includes a substrate, an emitter formed on the substrate and a dielectric layer formed on the substrate and having an opening formed about the emitter. The baseplate also includes a conductive extraction grid formed on the dielectric layer and having an opening formed about the emitter.

Abstract translation: 高分辨率场致发射显示器包括面板和底板。 面板包括透明观察层，形成在透明观察层上的透明导电层和形成在透明导电层上的光吸收不透明绝缘材料的相交条纹。 绝缘材料在相交条纹之间限定了小于百微米宽的开口。 面板还包括多个阴极发光材料的局部区域，每个区域形成在一个开口中。 阴极发光材料包括在阴极发光材料中提供降低的电阻率的金属氧化物。 显着地，阴极发光材料的电阻率降低以及绝缘材料的聚焦效果在面板上形成的发光图像中提供了增加的锐度。 基板包括基板，形成在基板上的发射极和形成在基板上并具有围绕发射极形成的开口的电介质层。 底板还包括形成在电介质层上并具有围绕发射极形成的开口的导电提取栅格。

公开(公告)号：US06555896B2

公开(公告)日：2003-04-29

申请号：US09745848

申请日：2000-12-21

Applicant: David A. Cathey ,  J. Brett Rolfson ,  Valerie A. Ward ,  Karen M. Winchester

Inventor： David A. Cathey ,  J. Brett Rolfson ,  Valerie A. Ward ,  Karen M. Winchester

IPC: H01L2358

CPC classification number: H01L21/31116 ,  H01L21/3185 ,  Y10S438/97

Abstract: A etch stop layer for use in a silicon oxide dry fluorine etch process is made of silicon nitride with hydrogen incorporated in it either in the form of N—H bonds, Si—H bonds, or entrapped free hydrogen. The etch stop layer is made by either increasing the NH3 flow, decreasing the SiH4 flow, decreasing the nitrogen flow, or all three, in a standard PECVD silicon nitride fabrication process. The etch stop can alternatively be made by pulsing the RF field in either a PECVD process or an LPCVD process.

Abstract translation: 用于氧化硅干氟蚀刻工艺中的蚀刻停止层由氮化物制成，其中以N-H键，Si-H键或截留的游离氢的形式掺入氢。 蚀刻停止层是通过在标准PECVD氮化硅制造工艺中增加NH 3流，降低SiH4流量，降低氮气流量或全部三种来制备的。 替代地，蚀刻停止可以通过在PECVD工艺或LPCVD工艺中脉冲RF场来制造。

公开(公告)号：US06509677B2

公开(公告)日：2003-01-21

申请号：US10147687

申请日：2002-05-16

Applicant: Zhongyi Xia ,  Jimmy J. Browning ,  Charles M Watkins ,  David A. Cathey

Inventor： Zhongyi Xia ,  Jimmy J. Browning ,  Charles M Watkins ,  David A. Cathey

IPC: H01J102

CPC classification number: H01J29/085

Abstract: A high resolution field emission display includes a faceplate and a baseplate. The faceplate includes a transparent viewing layer, a transparent conductive layer formed on the transparent viewing layer and intersecting stripes of light-absorbing, opaque insulating material formed on the transparent conductive layer. The insulating material defines openings less than one hundred microns wide between the intersecting stripes. The faceplate also includes a plurality of localized regions of cathodoluminescent material, each formed in one of the openings. The cathodoluminescent material includes a metal oxide providing reduced resistivity in the cathodoluminescent material. Significantly, the reduced resistivity of the cathodoluminescent material together with the focusing effect of the insulating material provide increased acuity in luminous images formed on the faceplate. The baseplate includes a substrate, an emitter formed on the substrate and a dielectric layer formed on the substrate and having an opening formed about the emitter. The baseplate also includes a conductive extraction grid formed on the dielectric layer and having an opening formed about the emitter.

公开(公告)号：US06491559B1

公开(公告)日：2002-12-10

申请号：US09438936

申请日：1999-11-12

Applicant: Robert T. Rasmussen ,  David A. Cathey

Inventor： Robert T. Rasmussen ,  David A. Cathey

IPC: H01J924

CPC classification number: H01J9/185 ,  H01J9/242 ,  H01J29/028 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/8655 ,  H01J2329/866

Abstract: A faceplate in a flat panel display has attachment sites made with a method that includes steps of mixing frit and photoresist to form a mixture, applying the mixture to the substrate, softbaking the substrate and mixture, and exposing and developing the resist to define adhesion sites. Spacers are then attached to the faceplate at the adhesion sites.

Abstract translation: 平板显示器中的面板具有通过以下方法制造的附接部位，该方法包括混合玻璃料和光致抗蚀剂以形成混合物的步骤，将混合物施加到基材上，软化基材和混合物，以及曝光和显影抗蚀剂以限定粘合位点 。 然后将间隔物附着在粘合部位的面板上。

公开(公告)号：US06441634B1

公开(公告)日：2002-08-27

申请号：US08931097

申请日：1997-09-15

Applicant: Jim Browning ,  Charles M. Watkins ,  David A. Cathey

Inventor： Jim Browning ,  Charles M. Watkins ,  David A. Cathey

IPC: G01R3102

CPC classification number: G01R31/257 ,  G01R35/002 ,  Y10S345/904

Abstract: A method of electrically testing pixel functionality is provided comprising releasably disposing a wafer in a socket. The wafer has at least one baseplate comprised of cathode emitters arranged in pixels. The socket has pads. The socket pads are contacted with test pins, and each of the pixels is addressed individually, thereby causing the cathode emitters to emit electrons in a current. The current is collected from each of the pixels on an anode screen. Alternatively, the anode card may have pins, and these pins contact pads on the baseplate. The baseplate, or substrate with baseplates, does not require a socket with pins.

Abstract translation: 提供了一种电测试像素功能性的方法，包括将晶片可释放地设置在插座中。 晶片具有至少一个由以像素排列的阴极发射体组成的基板。 插座有垫。 插座焊盘与测试引脚接触，并且每个像素被单独寻址，从而使阴极发射体以电流发射电子。 从阳极屏幕上的每个像素收集电流。 或者，阳极卡可以具有引脚，并且这些引脚接触基板上的焊盘。 底板或带基板的基板不需要带插脚的插座。

公开(公告)号：US06346931B1

公开(公告)日：2002-02-12

申请号：US09535964

申请日：2000-03-27

Applicant: David A. Cathey ,  James J. Cathey

Inventor： David A. Cathey ,  James J. Cathey

IPC: G09G322

CPC classification number: G09G3/22 ,  H01J31/127 ,  H01J2329/4695

Abstract: The image rendered by a field emission display is altered. The display includes emitter tips, an extraction grid, and conductive elements in a display screen. A first voltage is applied to at least one emitter tip, a second voltage is applied to the extraction grid at a location proximate the emitter tip to which the first voltage is applied, and a third voltage is applied to a portion of the display screen. The second and third voltages are separately variable so that an adjustment causing a voltage increase in one of the second and third voltages can take effect concurrently with another adjustment causing a voltage decrease in the other of the second and third voltages. The first, second, and third voltages cooperate with the structure to generate an electron emission stream impinging upon a first area of the display screen. The area of the display screen impinged by the electron emission stream is changed.

Abstract translation: 由场发射显示器呈现的图像被改变。 显示器包括发射器尖端，提取栅格和显示屏中的导电元件。 将第一电压施加到至少一个发射极尖端，在靠近施加第一电压的发射极尖端的位置处将第二电压施加到提取栅极，并且将第三电压施加到显示屏的一部分。 第二和第三电压是分开变化的，使得在第二和第三电压中的一个电压中引起电压增加的调节可以与引起第二和第三电压中另一个电压降低的另一个调节同时发生。 第一，第二和第三电压与该结构协调以产生撞击在显示屏的第一区域上的电子发射流。 改变由电子发射流侵入的显示屏的面积。

公开(公告)号：US06329750B1

公开(公告)日：2001-12-11

申请号：US09302082

申请日：1999-04-29

Applicant: James J. Hofmann ,  Jason B. Elledge ,  Zhong-Yi Xia ,  David A. Cathey

Inventor： James J. Hofmann ,  Jason B. Elledge ,  Zhong-Yi Xia ,  David A. Cathey

IPC: H01J6304

CPC classification number: H01J9/242 ,  H01J9/185 ,  H01J2329/8625 ,  H01J2329/863

Abstract: A process is disclosed for anodically bonding an array of spacer columns to one of the inner major faces on one of the generally planar plates of an evacuated, flat-panel video display. The process includes the steps of: providing a generally planar plate having a plurality of spacer column attachment sites; providing electrical interconnection between all attachment sites; coating each attachment site with a patch of oxidizable material; providing an array of unattached permanent glass spacer columns, each unattached permanent spacer columns being of uniform length and being positioned longitudinally perpendicular to a single plane, with the plane intersecting the midpoint of each unattached spacer column; positioning the array such that an end of one permanent spacer column is in contact with the oxidizable material patch at each attachment site; and anodically bonding the contacting end of each permanent spacer column to the oxidizable material layer. The invention also includes an evacuated flat panel display having spacer structures which are anodically bonded to an internal major face of the display, as well as a face plate assembly manufactured by the aforestated process.

Abstract translation: 公开了一种用于将隔离柱阵列阳极结合到抽空的平板显示器的一个平面板上的内主表面之一的工艺。 该方法包括以下步骤：提供具有多个间隔柱附着位点的大致平面的板; 提供所有附件位置之间的电气互连; 用一块可氧化材料涂覆每个附着部位; 提供一组未连接的永久性玻璃间隔柱，每个未连接的永久间隔柱具有均匀的长度并且纵向垂直于单个平面定位，其中平面与每个未连接的间隔柱的中点相交; 定位阵列使得一个永久间隔柱的末端在每个附着位置与可氧化材料贴片接触; 并将每个永久间隔柱的接触端阳极结合到可氧化材料层上。 本发明还包括具有阳极结合到显示器的内部主面的间隔结构的抽真空平板显示器以及通过前述方法制造的面板组件。

公开(公告)号：US06299499B1

公开(公告)日：2001-10-09

申请号：US09609492

申请日：2000-06-30

Applicant: David H. Wells ,  David A. Cathey

Inventor： David H. Wells ,  David A. Cathey

IPC: H01J902

CPC classification number: H01J9/025

Abstract: A method for creating emitters of a field emission device is provided. First, a hardmask layer is deposited on a substrate used to form emitters. On the hardmask layer, a photoresist layer is deposited. Islands of photoresist are exposed by an exposing energy through holes in a mask layer. The mask layer is removed and the substrate soft-baked in an oven having an atmosphere of basic gas. Following the soft-bake, the substrate is flood exposed, and then developed using conventional means, leaving behind hardened islands of exposed and baked photoresist. The hardmask layer is etched using the hardened islands as an etching barrier, and the substrate etched with a chemical etchant using the etched hardmask layer as an etching barrier. The etching continues until the substrate material below the etched hardmask layer is formed into an array of points of substrate. Once these emitter sites are formed, a field emission display having uniform emitters can be created.

Abstract translation: 提供了一种用于产生场致发射装置的发射器的方法。 首先，硬掩模层沉积在用于形成发射体的衬底上。 在硬掩模层上沉积光致抗蚀剂层。 光致抗蚀剂岛通过曝光能量暴露在掩模层中的孔中。 去除掩模层，并将基板在具有碱性气体气氛的烘箱中软烘烤。 在软烘烤之后，基材被暴露，然后用常规方法显影，留下暴露和烘烤的光致抗蚀剂的硬化岛。 使用硬化的岛作为蚀刻阻挡层来蚀刻硬掩模层，并且使用蚀刻的硬掩模层作为蚀刻阻挡层用化学蚀刻剂蚀刻衬底。 蚀刻继续，直到被蚀刻的硬掩模层下方的衬底材料形成为衬底点的阵列。 一旦形成了这些发射极点，就可以产生具有均匀发射极的场发射显示。