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121.
公开(公告)号:US20180166442A1
公开(公告)日:2018-06-14
申请号:US15838451
申请日:2017-12-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Ta Yu , Sheng-Chen Wang , Cheng-Yu Yang , Kai-Hsuan Lee , Sai-Hooi Yeong , Feng-Cheng Yang , Yen-Ming Chen
IPC: H01L27/088 , H01L21/8234 , H01L29/08
CPC classification number: H01L27/0886 , H01L21/823418 , H01L21/823431 , H01L21/823475 , H01L29/0847
Abstract: A FinFET device is provided. The FinFET device includes a plurality of fin structures that protrude upwardly out of a dielectric isolation structure. The FinFET device also includes a plurality of gate structures that partially wrap around the fin structures. The fin structures each extend in a first direction, and the gate structures each extend in a second direction different from the first direction. An epitaxial structure is formed over at least a side surface of each of the fin structures. The epitaxial structure includes: a first epi-layer, a second epi-layer, or a third epi-layer. The epitaxial structure formed over each fin structure is separated from adjacent epitaxial structures by a gap. A silicide layer is formed over each of the epitaxial structures. The silicide layer at least partially fills in the gap. Conductive contacts are formed over the silicide layer.
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公开(公告)号:US09953836B2
公开(公告)日:2018-04-24
申请号:US14607971
申请日:2015-01-28
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Tsung-Yao Wen , Sheng-Chen Wang , Sai-Hooi Yeong , Hsueh-Chang Sung , Ya-Yun Cheng
IPC: H01L27/092 , H01L21/265 , H01L21/8238 , H01L21/8234 , H01L29/66 , H01L21/84 , H01L27/12 , H01L29/10 , H01L21/324 , H01L29/04 , H01L29/06 , H01L29/161 , H01L27/088 , H01L29/78
CPC classification number: H01L21/26513 , H01L21/324 , H01L21/823431 , H01L21/823807 , H01L21/823821 , H01L21/845 , H01L27/0886 , H01L27/0924 , H01L27/1211 , H01L29/045 , H01L29/0653 , H01L29/1033 , H01L29/1054 , H01L29/1083 , H01L29/161 , H01L29/6656 , H01L29/66795 , H01L29/785 , H01L29/7851
Abstract: A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from the substrate. The FinFET device structure also includes an anti-punch through implant (APT) region formed in the fin structure and a barrier layer formed on the APT region. The barrier layer has a middle portion and a peripheral portion, and the middle portion is higher than the peripheral portion. The FinFET device structure further includes an epitaxial layer formed on the barrier layer.
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