Abstract:
A ReRAM memory cell includes a ReRAM device including a solid electrolyte layer disposed between a first ion-source electrode and a second electrode and a select circuit including two series-connected select transistors connected in series with the ReRAM device, each of the two series-connected select transistors having a gate connected to a separate control line.
Abstract:
A ripple reduction circuit is provided. The ripple reduction circuit may include a ripple capacitor configured to drive at least a first segment of a string of light emitting diodes (LEDs), a first diode having an anode coupled to the ripple capacitor, and a cathode configured to be coupled to an input end of the first LED segment, a second diode having a cathode coupled to the ripple capacitor and the anode of the first diode, and an anode configured to be coupled between the first LED segment and a second LED segment of the string of LEDs, a third diode having an anode coupled to the ripple capacitor, and a cathode configured to be coupled to a last LED segment of the string of LEDs, and a fourth diode having a cathode coupled to the ripple capacitor and the anode of the third diode.
Abstract:
Systems and methods are disclosed for operating a highly linearized resistance for a switch through use of a bootstrapped features. In one exemplary implementation, there is provided a method and system that implements a method for operating a circuit configured to provide a highly linearized resistance including receiving a signal via a bootstrapped switch, coupling the received signal to a gate if the received signal is high, receiving a signal via a switch control input coupled to a high impedance element. Moreover, the method includes coupling the high impedance element to the gate and turning off the switch via a gate turn off when the gate turn off pulls the gate low.
Abstract:
The invention relates to the control of auxiliary power supply connected in parallel with a switch of a switching regulator. A switch and a diode are included within the connection to the auxiliary supply. The auxiliary supply switch enables a flow of current to the auxiliary supply when the auxiliary supply switch is on and the switch in parallel is off. The auxiliary diode prevents a reverse flow of current when the switch in parallel is on. The auxiliary power supply is suitable to supply of current in both stages of switching regulator operation, to configurations with a common node carrying either type of potential, steady or switching, provides supply of current at high efficiency in the switching stage of switching regulator operation, and provides high efficiency over a wide range of operating conditions of the switching regulator.
Abstract:
The invention comprises a dimming switch for use with a string of light emitting diodes (LEDs). The dimming switch comprises a bipolar junction transistor (BJT) driven in a cascode scheme. The dimming switch also comprises circuitry to offset the current that drives the base of the BJT to provide a controlled amount of current to the LEDs when the dimming input signal is high.
Abstract:
An LED driver circuit for controlling direct current supplied to a plurality of serially connected segments of Light Emitting Diodes (LEDs) is disclosed. In one embodiment, the LED driver circuit comprises a self-commutating circuit, which comprises a plurality of current control elements, each current control element having two ends, a first end connected to a different end of each segment along the plurality of serially connected segments of LEDs and a second end connected to a path to ground. The path to ground comprises a sense resistor and the path to ground is shared by the second end of each current control element. Each current control element is coupled to an adjacent current control element by a cross-regulation circuit and controlled by a signal from an adjacent current control element.
Abstract:
The invention comprises a dimming switch for use with a string of light emitting diodes (LEDs). The dimming switch comprises a bipolar junction transistor (BJT) driven in a cascode scheme. The dimming switch also comprises circuitry to offset the current that drives the base of the BJT to provide a controlled amount of current to the LEDs when the dimming input signal is high.
Abstract:
An analog-to-digital conversion apparatus for converting a plurality of analog input signals may include a plurality of analog input, a plurality of sample and hold circuits, one or more analog-to-digital converters (ADCs), a plurality of trigger selection circuits, and one or more analog multiplexers. The analog inputs may receive an analog input signals. The sample and hold circuits may include an input selectively coupled to at least one of the plurality of input and an output. The analog-to-digital converters (ADCs) may include an input and an output. The trigger selection circuits may selectively couple one of the inputs to one of the sample and hold circuits. The analog multiplexers may include a plurality of inputs selectively coupled to one or more of the sample and hold circuit outputs and an output coupled to one of the one or more analog-to-digital-converters.
Abstract:
Arbitration of multiple transponders, such as RFID tags, occurs in an interrogation field. The arbitration process is custom-tailored for individual applications, under software control, by the transponder reader or tag reader. Different wake-up slots are calculated for each tag during successive transmission cycles based upon the tag ID and the transmission cycle number. The tag reader may also send a special command to a tag to read its data and cause the tag to become decoupled from the environment. The tags may be selectively placed in either a tag-talk-first mode or a reader-talk-first mode. Furthermore, the tag reader may send a special fast read command to the tag which includes a read request and at least one parameter of the read request.
Abstract:
A remote control system for opening and closing a barrier, such as a garage door, includes an RF receiver and a plurality of RF transmitters. The transmitters and receiver include circuitry programmed to provide transmission of encrypted code signals each time the transmitters are used and employing a code hopping method which prevents unauthorized signal interception or code "grabbing". The system is operated in a code learning mode for the receiver by momentarily actuating a receiver learn mode button for receiving each transmitter identification code and a secret decryption key for that transmitter with the system automatically returning to the operate mode. Each transmitter identification and secret key code signal is automatically and randomly stored in an available and unused memory in the receiver circuitry. A multibit hopping code is transmitted from each transmitter to the receiver with each transmitter operation in the operate mode of the system and the hopping code changes with each transmission to prevent theft or code grabbing and resultant unauthorized operation of the system.